參數(shù)資料
型號(hào): DS1100LU-30/T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 1/7頁(yè)
文件大?。?/td> 0K
描述: IC DELAY LINE 5TAP 30NS 8-USOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 3,000
標(biāo)片/步級(jí)數(shù): 5
功能: 不可編程
延遲到第一抽頭: 6ns
接頭增量: 6ns
可用的總延遲: 30ns
獨(dú)立延遲數(shù): 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 帶卷 (TR)
1 of 7
GENERAL DESCRIPTION
The DS1100L is a 3.3V version of the DS1100. It
is characterized for operation over the range 3.0V
to 3.6V. The DS1100L series delay lines have
five equally spaced taps providing delays from
4ns to 500ns. These devices are offered in
surface-mount packages to save PCB area. Low
cost
and
superior
reliability
over
hybrid
technology is achieved by the combination of a
100% silicon delay line and industry-standard
MAX and SO packaging. The DS1100L 5-tap
silicon delay line reproduces the input-logic state
at the output after a fixed delay as specified by
the extension of the part number after the dash.
The DS1100L is designed to reproduce both
leading and trailing edges with equal precision.
Each tap is capable of driving up to 10 74LS
loads.
Maxim can customize standard products to meet
special needs.
FEATURES
All-Silicon Timing Circuit
Five Taps Equally Spaced
Delays are Stable and Precise
Both Leading- and Trailing-Edge Accuracy
3.3V Version of the DS1100
Low-Power CMOS
TTL-/CMOS-Compatible
Vapor-Phase and IR Solderable
Custom Delays Available
Fast-Turn Prototypes
Delays Specified Over Both Commercial and
Industrial Temperature Ranges
PIN ASSIGNMENT
PIN DESCRIPTION
TAP 1 to TAP 5
- TAP Output Number
VCC
- +3.3V
GND
- Ground
IN
- Input
DS1100L
3.3V 5-Tap Economy Timing Element (Delay Line)
1
2
3
4
8
7
6
5
VCC
TAP 1
TAP 3
TAP 5
IN
TAP 2
TAP 4
GND
DS1100LZ SO (150 mils)
DS1100LU MAX
19-5736; Rev 10/11
MAX is a registered trademark of Maxim Integrated Products, Inc.
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