- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9320 > DS1251Y-70 (Maxim Integrated Products)IC NVSRAM 4MBIT 70NS 32DIP PDF資料下載
參數(shù)資料
| 型號(hào)： | DS1251Y-70 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC NVSRAM 4MBIT 70NS 32DIP |
| 標(biāo)準(zhǔn)包裝： | 11 |
| 類型： | Phantom 計(jì)時(shí)芯片 |
| 特點(diǎn)： | 閏年，NVSRAM |
| 存儲(chǔ)容量： | 512KB |
| 時(shí)間格式： | HH:MM:SS:hh（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 32-DIP 模塊（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 32-EDIP |
| 包裝： | 管件 |
DS1251/DS1251P
18 of 20
AC TEST CONDITIONS
Output Load: 50pF + 1TTL Gate
Input Pulse Levels: 0 to 3V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
NOTES:
1) WE is high for a read cycle.
2) OE = VIH or VIL. If OE = VIH during write cycle, the output buffers remain in a high-impedance state.
3) tWP is specified as the logical AND of CE and WE. tWP is measured from the latter of CE or WE going
low to the earlier of CE or WE going high.
4) tDH, t DS are measured from the earlier of CE or WE going high.
5) These parameters are sampled with a 50pF load and are not 100% tested.
6) If the CE low transition occurs simultaneously with or later than the WE low transition in Write Cycle
1, the output buffers remain in a high-impedance state during this period.
7) If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in a high-impedance state during this period.
8) If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high impedance state during this period.
9) The expected tDR is defined as cumulative time in the absence of VCC with the clock oscillator
running.
10) tWR is a function of the latter occurring edge of WE or CE.
11) Voltages are referenced to ground.
12) RST (Pin 1) has an internal pullup resistor.
13) Real-time clock modules can be successfully processed through conventional wave-soldering
techniques as long as temperature exposure to the lithium energy source contained within does not
exceed +85°C. Post-solder cleaning with water-washing techniques is acceptable, provided that
ultrasonic vibration is not used.
In addition, for the PowerCap:
1) Maxim recommends that PowerCap Module bases experience one pass through solder reflow oriented
with the label side up (“l(fā)ive-bug”).
2) Hand soldering and touch-up: Do not touch or apply the soldering iron to leads for more than three
seconds.
To solder, apply flux to the pad, heat the lead frame pad, and apply solder. To remove the part,
apply flux, heat the lead frame pad until the solder reflows, and use a solder wick to remove
solder.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCP4441T-103E/ST | IC DGTL POT 129TAPS QUAD 20TSSOP |
| VE-B1D-MW-B1 | CONVERTER MOD DC/DC 85V 100W |
| DS1251W-120 | IC NVSRAM 4MBIT 120NS 32DIP |
| MCP4441T-502E/ST | IC DGTL POT 129TAPS QUAD 20TSSOP |
| MCP4441T-503E/ST | IC DGTL POT 129TAPS QUAD 20TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1251Y-70+ | 功能描述:實(shí)時(shí)時(shí)鐘 4096K NV SRAM w/Phantom Clock RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1251YP | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:4096k NV SRAM with Phantom Clock |
| DS1251YP/WP | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:PowerCap with Crystal |
| DS1251YP-100 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS1251YP-70 | 功能描述:實(shí)時(shí)時(shí)鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。