Low-Current I2C RTC with 56-Byte NV RAM 14 Maxim Integrated bytes. The ma" />
參數(shù)資料
型號(hào): DS1308U-18+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 6/16頁(yè)
文件大小: 0K
描述: IC RTC 56BYTE NVRAM I2C 8UMAX
標(biāo)準(zhǔn)包裝: 50
類型: 時(shí)鐘/日歷
特點(diǎn): 閏年,NVSRAM,方波輸出
存儲(chǔ)容量: 56B
時(shí)間格式: HH:MM:SS(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 1.71 V ~ 5.5 V
電壓 - 電源,電池: 1.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 管件
DS1308
Low-Current I2C RTC with 56-Byte NV RAM
14
Maxim Integrated
bytes. The master must NACK the last byte read to
terminate communication so the slave returns control
of SDA to the master.
Slave Address Byte: Each slave on the I2C bus
responds to a slave address byte sent immediately
following a START condition. The slave address byte
contains the slave address in the most significant 7
bits and the R/W bit in the least significant bit. The
slave address is D0h and cannot be modified by the
user. When the R/W bit is 0 (such as in D0h), the mas-
ter is indicating it writes data to the slave. If R/W = 1,
(D1h in this case), the master is indicating it wants
to read from the slave. If an incorrect slave address
is written, the DS1308 assumes the master is com-
municating with another I2C device and ignores the
communication until the next START condition is sent.
Memory Address: During an I2C write operation, the
master must transmit a memory address to identify
the memory location where the slave is to store the
data. The memory address is always the second byte
transmitted during a write operation following the
slave address byte.
I2C Communication
Writing a Single Byte to a Slave: The master must
generate a START condition, write the slave address
byte (R/W = 0), write the memory address, write
the byte of data, and generate a STOP condition.
Remember the master must read the slave’s acknowl-
edgment during all byte write operations.
Writing Multiple Bytes to a Slave: To write multiple
bytes to a slave, the master generates a START condi-
tion, writes the slave address byte (R/W = 0), writes
the starting memory address, writes multiple data
bytes, and generates a STOP condition.
Reading a Single Byte from a Slave: Unlike the
write operation that uses the specified memory
address byte to define where the data is to be
written, the read operation occurs at the present
value of the memory address counter. To read a
single byte from the slave, the master generates
a START condition, writes the slave address byte
with R/W= 1, reads the data byte with a NACK to
indicate the end of the transfer, and generates a
STOP condition. However, since requiring the mas-
ter to keep track of the memory address counter is
Figure 7. I2C Transactions
SLAVE
ADDRESS
START
1
0
1
0
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
R/W
MSB
LSB
MSB
LSB
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
READ/
WRITE
REGISTER ADDRESS
b7
b6
b5
b4
b3
b2
b1
b0
DATA
STOP
SINGLE BYTE WRITE
-WRITE CONTROL REGISTER
TO BFh
MULTIBYTE WRITE
-WRITE DATE REGISTER
TO "02" AND MONTH
REGISTER TO "11"
SINGLE BYTE READ
-READ CONTROL REGISTER
MULTIBYTE READ
-READ HOURS AND DAY
REGISTER VALUES
START
REPEATED
START
D1h
MASTER
NACK
STOP
1 1010000
00000111
07h
1 1010001
1101000 0
0 000011 1
D0h
07h
STOP
VALUE
START 11010000
00000100
D0h
04h
DATA
MASTER
NACK
STOP
VALUE
DATA
02h
BFh
EXAMPLE I2C TRANSACTIONS
TYPICAL I2C WRITE TRANSACTION
10111111
00000010
D0h
A)
C)
B)
D)
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
REPEATED
START
D1h
MASTER
ACK
1 1010001
VALUE
DATA
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
START 11010000
00000010
D0h
02h
SLAVE
ACK
SLAVE
ACK
STOP
11h
0001000 1
SLAVE
ACK
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