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參數(shù)資料
| 型號： | DS1315EN-5 |
| 英文描述： | Phantom Time Chip |
| 中文描述： | 幻影時鐘芯片 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大?。?/td> | 523K |
| 代理商： | DS1315EN-5 |
DS1315
5 of 21
NONVOLATILE CONTROLLER OPERATION
The operation of the nonvolatile controller circuits within the Time Chip is determined by the level of the
ROM/
RAM
select pin. When ROM/
RAM
is connected to ground, the controller is set in the RAM mode
and performs the circuit functions required to make CMOS RAM and the timekeeping function
nonvolatile. A switch is provided to direct power from the battery inputs or V
CCI
to V
CCO
with a
maximum voltage drop of 0.3 volts. The V
CCO
output pin is used to supply uninterrupted power to CMOS
SRAM. The DS1315 also performs redundant battery control for high reliability. On power-fail, the
battery with the highest voltage is automatically switched to V
CCO
. If only one battery is used in the
system, the unused battery input should be connected to ground.
The DS1315 safeguards the Time Chip and RAM data by power-fail detection and write protection.
Power-fail detection occurs when V
CCI
falls below V
PF
which is set by an internal bandgap reference. The
DS1315 constantly monitors the V
CCI
supply pin. When V
CCI
is less than V
PF
, power-fail circuitry forces
the chip enable output (
CEO
) to V
CCI
or V
BAT
-0.2 volts for external RAM write protection. During
nominal supply conditions,
CEO
will track
CEI
with a propagation delay. Internally, the DS1315 aborts
any data transfer in progress without changing any of the Time Chip registers and prevents future access
until V
CCI
exceeds V
PF
. A typical RAM/Time Chip interface is illustrated in Figure 3.
When the ROM/
RAM
pin is connected to V
CCO
, the controller is set in the ROM mode. Since ROM is a
read-only device that retains data in the absence of power, battery backup and write protection is not
required. As a result, the chip enable logic will force
CEO
low when power fails. However, the Time
Chip does retain the same internal nonvolatility and write protection as described in the RAM mode. A
typical ROM/Time Chip interface is illustrated in Figure 4.
DS1315 TO RAM/TIME CHIP INTERFACE
Figure 3
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PDF描述 |
|---|---|
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| DS1321 | Flexible Nonvolatile Controller with Lithium Battery Monitor |
| DS1330AB | 256k Nonvolatile SRAM with Battery Monitor |
| DS1330YP-100-IND | Isolation Transformer |
| DS1330ABP-100 | 256k Nonvolatile SRAM with Battery Monitor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1315EN-5/R | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Phantom Time Chip |
| DS1315EN-5/T | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Phantom Time Chip |
| DS1315EN-5/T&R | 制造商:Maxim Integrated Products 功能描述:IC TIME CHIP PHANTOM 20-TSSOP |
| DS1315EN-5/T&R | 功能描述:IC TIME CHIP PHANTOM 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 實時時鐘 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時鐘/日歷 特點:警報器，閏年，SRAM 存儲容量:- 時間格式:HH:MM:SS（12/24 小時） 數(shù)據(jù)格式:YY-MM-DD-dd 接口:SPI 電源電壓:2 V ~ 5.5 V 電壓 - 電源，電池:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN EP 包裝:管件 |
| DS1315EN-5+ | 功能描述:實時時鐘 Phantom Time Chip RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
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