參數(shù)資料
型號: DS1321S
廠商: Maxim Integrated
文件頁數(shù): 10/13頁
文件大?。?/td> 0K
描述: IC CTRLR NV W/BATT MON 5V 16SOIC
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 50
控制器類型: 非易失性 RAM
電源電壓: 4.75 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 管件
DS1321
6 of 13
ABSOLUTE MAXIMUM RATINGS
Voltage Range on Any Pin Relative to Ground
-0.5V to +6.0V
Operating Temperature Range
-40°C to +85°C
Storage Temperature Range
-55°C to +125°C
Soldering Temperature (reflow, SO or TSSOP)
+260°C
Lead Temperature (soldering, 10s)
+300°C
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operation sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of
time may affect reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
PDIP
Junction-to-Ambient Thermal Resistance (θJA).…………………...………………………......95°C/W
Junction-to-Case Thermal Resistance (θJC)……………………………………………………35°C/W
SO
Junction-to-Ambient Thermal Resistance (θJA).…………………...………………………......75°C/W
Junction-to-Case Thermal Resistance (θJC)……………………………………………………24°C/W
TSSOP
Junction-to-Ambient Thermal Resistance (θJA).……………………………………………..73.8°C/W
Junction-to-Case Thermal Resistance (θJC)……………………………………………………20°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board
for the SMT packages. For detailed information on package thermal considerations, refer to
RECOMMENDED OPERATING CONDITIONS
(-40°C to +85°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Supply Voltage TOL=GND
VCCI
4.75
5.0
5.5
V
2
Supply Voltage TOL=VCCO
VCCI
4.5
5.0
5.5
V
2
Battery Supply Voltage
VBAT
2.0
3.0
6.0
V
2
Logic 1 Input
VIH
2.0
VCCI+0.3
V
2. 13
Logic 0 Input
VIL
-0.3
+0.8
V
2, 13
DC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCCI ≥ VCCTP)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Operating Current (TTL inputs)
ICC1
1
1.5
mA
3
Operating Current (CMOS inputs)
ICC2
100
150
A
3, 6
RAM Supply Voltage
VCCO
VCC1
-0.2
V
2
RAM Supply Current
(VCCO ≥ VCCI -0.2V)
ICCO1
185
mA
4
Supply Current
(VCCO ≥ VCCI -0.3V)
ICCO2
260
mA
5
VCC Trip Point (TOL=GND)
VCCTP
4.50
4.62
4.75
V
2
VCC Trip Point (TOL=VCCO)
VCCTP
4.25
4.37
4.50
V
2
VBAT Trip Point
VBTP
2.50
2.6
2.70
V
2
Output Current @ 2.2V
IOH
-1
mA
8, 11
Output Current @ 0.4V
IOL
4
mA
8, 11
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