參數(shù)資料
型號: DS1343E-3+
廠商: Maxim Integrated Products
文件頁數(shù): 19/20頁
文件大?。?/td> 0K
描述: IC RTC SPI 3.0V 20TSSOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 74
類型: 時鐘/日歷
特點: 警報器,閏年,NVRAM,方波輸出,涓流充電器
存儲容量: 96B
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: SPI
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 20-TSSOP
包裝: 管件
8
Maxim Integrated
Low-Current SPI/3-Wire RTCs
DS1343/DS1344
Pin Configurations
Pin Descriptions
+
TOP VIEW
TSSOP
17
4
N.C.
18
3
X1
19
2
N.C.
20
1
VCC
VBAT
14
7
SCLK
15
6
SDI
N.C.
13
8
N.C.
12
9
CE
11
10
SERMODE
GND
16
5
SDO
X2
DS1343
DS1344
DS1343
DS1344
INT0
PF
INT1
N.C.
INT1
TDFN
(3mm × 3mm)
TOP VIEW
24
5
13
11
10
SERMODE
SDO
SDI
X1
INT0
1
14
V CC
V BAT
3
12
X2
6
9
SCLK
7
EP
8
CE
GND
PIN
NAME
FUNCTION
TSSOP
TDFN-EP
1
VBAT
Battery Input for Standard +3V Lithium Cell or Other Energy Source. UL recognized
to ensure against reverse charging current when used in conjunction with a primary
lithium battery.
2, 4, 6, 8,
13, 17, 19
5
N.C.
No Connection. N.C. pins can be connected to GND to reduce noise around the
crystal inputs.
3
2
X1
Connections for Standard 32.768kHz Quartz Crystal (see the Crystal Characteristics
table). The devices can also be driven by an external 32.768kHz oscillator. In this
configuration, the X1 pin is connected to the external oscillator and the X2 pin is left
unconnected.
5
3
X2
7
4
INT0
Active-Low Interrupt 0 Output. INT0 is an active-low output that can be used as
an interrupt output to a processor. INT0 can be programmed to be asserted by
only Alarm 0, or can be programmed to be asserted by either Alarm 0 or Alarm 1.
INT0 remains low as long as the status bit causing the interrupt is present and the
corresponding interrupt enable bit is set. INT0 operates when the component is
powered by VCC or VBAT. INT0 is an open-drain output and requires an external
pullup resistor.
9
6
INT1
Active-Low Interrupt 1 Output. INT1 is an active-low output that can be used either
as an interrupt output to a processor or a 32kHz square-wave output. INT1 can be
programmed to be asserted by Alarm 1 only. INT1 remains low as long as the status
bit causing the interrupt is present and the corresponding interrupt enable bit is set.
INT1 operates when the component is powered by VCC or VBAT. INT1 is an open-
drain output and requires an external pullup resistor.
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