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參數(shù)資料
| 型號： | DS1344E-3+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC SPI 3.0V 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 時(shí)鐘/日歷 |
| 特點(diǎn)： | 警報(bào)器，閏年，NVRAM，方波輸出，涓流充電器 |
| 存儲容量： | 96B |
| 時(shí)間格式： | HH:MM:SS（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | SPI |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 電壓 - 電源，電池： | 1.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | DS1344E-3+T&RDKR |
18
Maxim Integrated
Low-Current SPI/3-Wire RTCs
DS1343/DS1344
Reading and Writing in Burst Mode
Burst mode is similar to a single-byte read or write,
except that CE is kept high and additional SCLK cycles
are sent until the end of the burst. The clock registers
and the user RAM can be read or written in burst mode.
The address pointer wraps around to 00h after reaching
1Fh (RTC), and the address pointer wraps around to 20h
after reaching 7Fh (RAM). See Figure 6.
3-Wire Interface
The 3-wire interface mode operates similarly to the SPI
mode. However, in 3-wire mode there is one I/O instead
of separate data-in and data-out signals. The 3-wire
interface consists of the I/O (SDI and SDO pins con-
nected together), CE, and SCLK pins. In 3-wire mode,
each byte is shifted in LSB first, unlike SPI mode, where
each byte is shifted in MSB first.
As is the case with the SPI mode, an address byte is
written to the device followed by a single data byte or
multiple data bytes. Figure 7 illustrates a write cycle, and
Figure 8 illustrates a read cycle. In 3-wire mode, data is
input on the rising edge of SCLK and output on the falling
edge of SCLK.
Applications Information
Power-Supply Decoupling
To achieve the best results when using the devices,
decouple the VCC power supply with a 0.01F and/or
0.1F capacitor. Use a high-quality, ceramic, surface-
mount capacitor if possible. Surface-mount components
minimize lead inductance, which improves performance,
and ceramic capacitors tend to have adequate high-
frequency response for decoupling applications.
Using Open-Drain Outputs
The INT0 and INT1 outputs are open drain and therefore
require external pullup resistors to realize a logic-high
output level.
Battery Charge Protection
The devices contain Maxim’s redundant battery-charge
protection circuit to prevent any charging of an external
battery. The DS1343 and DS1344 are recognized by
Underwriters Laboratories (UL) under file E141114.
Figure 7. 3-Wire Single-Byte Write
Figure 8. 3-Wire Single-Byte Read
D7
D6
D5
D4
D3
D2
D1
D0
1
A6
A5
A4
A3
A2
A1
A0
CE
SCLK
I/O*
*I/O IS SDI AND SDO CONNECTED TOGETHER.
SERMODE = GND.
HIGH-Z
R/W
A6
A5
A4
A3
A2
A1
A0
CE
SCLK
HIGH-Z
*I/O IS SDI AND SDO CONNECTED TOGETHER.
SERMODE = GND
I/O*
0
D0
D1
D2
D3
D4
D5
D6
D7
R/W
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