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參數(shù)資料
| 型號： | DS1345W |
| 英文描述： | 3.3V 1024k Nonvolatile SRAM with Battery Monitor |
| 中文描述： | 3.3V、1024k非易失SRAM，帶有電池監(jiān)測器 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 249K |
| 代理商： | DS1345W |
DS1345W
8 of 12
POWER-DOWN/POWER-UP TIMING
PARAMETER
V
CC
Fail Detect to
CE
and
WE
Inactive
V
CC
slew from V
TP
to 0V
V
CC
Fail Detect to
RST
Active
V
CC
slew from 0V to V
TP
V
CC
Valid to
CE
and
WE
Inactive
V
CC
Valid to End of Write
Protection
V
CC
Valid to
RST
Inactive
V
CC
Valid to
BW
Valid
(T
A
: See Note 10)
UNITS
SYMBOL
MIN
TYP
MAX
NOTES
t
PD
1.5
μs
11
t
F
150
μs
t
RPD
15
μs
14
t
R
150
μs
t
PU
2
ms
t
REC
125
ms
t
RPU
t
BPU
150
200
350
1
ms
s
14
14
BATTERY WARNING TIMING
PARAMETER
Battery Test Cycle
Battery Test Pulse Width
Battery Test to
BW
Active
(T
A
: See Note 10)
UNITS
hr
s
s
SYMBOL
t
BTC
t
BTPW
t
BW
MIN
TYP
24
MAX
NOTES
1
1
(T
A
= 25°C)
NOTES
PARAMETER
Expected Data
Retention Time
SYMBOL
MIN
TYP
MAX
UNITS
t
DR
10
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
NOTES:
1.
WE
is high for a read cycle.
2.
OE
= V
IH
or V
IL
. If
OE
= V
IH
during write cycle, the output buffers remain in a high impedance state.
3.
t
WP
is specified as the logical AND of
CE
and
WE
. t
WP
is measured from the latter of
CE
or
WE
going low to the earlier of
CE
or
WE
going high.
4.
t
DS
is measured from the earlier of
CE
or
WE
going high.
5.
These parameters are sampled with a 5 pF load and are not 100% tested.
6.
If the
CE
low transition occurs simultaneously with or latter than the
WE
low transition, the output
buffers remain in a high impedance state during this period.
7.
If the
CE
high transition occurs prior to or simultaneously with the
WE
high transition, the output
buffers remain in high impedance state during this period.
8.
If
WE
is low or the
WE
low transition occurs prior to or simultaneously with the
CE
low transition,
the output buffers remain in a high impedance state during this period.
9.
Each DS1345W has a built-in switch that disconnects the lithium source until V
CC
is first applied by
the user. The expected t
DR
is defined as accumulative time in the absence of V
CC
starting from the
time power is first applied by the user.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS1345WP-100-IND | 3.3V 1024k Nonvolatile SRAM with Battery Monitor |
| DS1345WP-150 | 3.3V 1024k Nonvolatile SRAM with Battery Monitor |
| DS1345WP-150-IND | 3.3V 1024k Nonvolatile SRAM with Battery Monitor |
| DS1350AB | 4096k Nonvolatile SRAM with Battery Monitor |
| DS1350ABP-70-IND | Circular Connector; MIL SPEC:MIL-C-5015; Body Material:Metal; Series:GTS; No. of Contacts:19; Connector Shell Size:24; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS1345WP-100 | 功能描述:NVRAM 3.3V 1024K NV SRAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1345WP-100+ | 功能描述:NVRAM 3.3V 1024K NV SRAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1345WP-100IND | 功能描述:NVRAM 3.3V 1024K NV SRAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
| DS1345WP-100-IND | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V 1024k Nonvolatile SRAM with Battery Monitor |
| DS1345WP-100IND+ | 功能描述:NVRAM 3.3V 1024K NV SRAM w/Battery Monitor RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube |
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