I2C RTC/Supervisor with Trickle Charger and 512 Bytes EEPROM Maxim Integrated 13" />
參數(shù)資料
型號(hào): DS1388Z-33+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 5/19頁(yè)
文件大小: 0K
描述: IC RTC I2C W/CHARGER 8-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類(lèi)型: 時(shí)鐘/日歷
特點(diǎn): EEPROM,閏年,監(jiān)控器,涓流充電器,監(jiān)視計(jì)時(shí)器
存儲(chǔ)容量: 512B
時(shí)間格式: HH:MM:SS:hh(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.97 V ~ 3.63 V
電壓 - 電源,電池: 1.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
I2C RTC/Supervisor with Trickle Charger
and 512 Bytes EEPROM
Maxim Integrated
13
DS1388
Control Register (00Ch)
Bit 7: Enable Oscillator (
EOSC). When set to logic 0,
the oscillator is started. When set to logic 1, the oscillator
is stopped when the DS1388 switches to battery power.
This setting can be used to conserve battery power
when timekeeping operation is not required. This bit is
cleared (logic 0) when power is first applied. When the
DS1388 is powered by VCC, the oscillator is always on
regardless of the status of the EOSC bit. The clock can
be halted whenever the timekeeping functions are not
required, which minimizes VBAT current (IBACKUPDR).
Bits 6 to 2: These bits read as zero and cannot be
modified.
Bit 1: Watchdog Enable (WDE). When set to logic
one, the watchdog counter is enabled. When set to
logic 0, the watchdog counter is disabled, and the two
registers can be used as NV RAM. This bit is cleared
(logic 0) when power is first applied.
Bit 0: Watchdog Reset (WD/
RST). This bit enables the
watchdog alarm output to drive the RST pin. When the
WD/RST bit is set to logic 1, RST pulses low for tRST if
WDE = 1 and the watchdog counter reaches zero.
When the WD/RST bit is set to logic 0, the RST pin is
not driven by the watchdog alarm; only the watchdog
flag bit (WF) in the flag register is set to logic 1. This bit
is logic 0 when power is first applied.
Trickle-Charge Register (00Ah)
The simplified schematic of Figure 5 shows the basic
components of the trickle charger. The trickle-charge
select (TCS) bits (bits 4–7) control the selection of the
trickle charger. To prevent accidental enabling, only a
pattern on 1010 enables the trickle charger. All other
patterns disable it. The trickle charger is disabled when
power is first applied. The diode-select (DS) bits (bits 2
and 3) select whether or not a diode is connected
between VCC and VBACKUP. If DS is 01, no diode is
selected, yet if DS is 10, a diode is selected. The ROUT
bits (bits 0 and 1) select the value of the resistor con-
nected between VCC and VBACKUP. Table 3 shows the
resistor selected by the resistor select (ROUT) bits and
the diode selected by the diode-select (DS) bits.
Warning: The ROUT value of 250
Ω must not be select-
ed whenever VCC is greater than 3.63V.
The user determines the diode and resistor selection
according to the maximum current desired for battery
or super cap charging. The maximum charging current
can be calculated as illustrated in the following exam-
ple. Assume that a system power supply of 3.3V is
applied to VCC and a super cap is connected to
VBACKUP. Also, assume that the trickle charger has
been enabled with a diode and resistor R2 between
VCC and VBACKUP. The maximum current IMAX would
be calculated as follows:
IMAX = (3.3V - diode drop) / R2
≈ (3.3V - 0.7V) / 2kΩ ≈
1.3mA
As the super cap charges, the voltage drop between
VCC and VBACKUP decreases and therefore the charge
current decreases.
Control Register (00Ch)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
EOSC
00000
WDE
WD/RST
Table 3. Trickle-Charge Register
TCS3
TCS2
TCS1
TCS0
DS1
DS0
ROUT1
ROUT0
FUNCTION
X
0
X
Disabled
X
1
X
Disabled
X
0
Disabled
101
00101
No diode, 250
Ω resistor
101
01001
One diode, 250
Ω resistor
101
00110
No diode, 2k
Ω resistor
101
01010
One diode, 2k
Ω resistor
101
00111
No diode, 4k
Ω resistor
101
01011
One diode, 4k
Ω resistor
000
00000
Initial default value—disabled
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