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參數(shù)資料
| 型號： | DS14285S |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 22/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC W/NV RAM CNTRL 24-SOIC |
| 標準包裝： | 31 |
| 類型： | 時鐘/日歷 |
| 特點： | 警報器，夏令時，閏年，NVSRAM，方波輸出 |
| 存儲容量： | 114B |
| 時間格式： | HH:MM:SS（12/24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 并聯(lián) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 2.5 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 24-SOIC W |
| 包裝： | 管件 |
DS14285/DS14287
5 of 26
RESET
(Reset Input) - The RESET pin has no effect on the clock, calendar, or RAM. On power-up the
RESET
pin can be held low for a time in order to allow the power supply to stabilize. The amount of time
that RESET is held low is dependent on the application. However, if RESET is used on power-up, the
time RESET is low should exceed 200 ms to make sure that the internal timer that controls the
DS14285/DS14287 on power-up has timed out. When RESET is low and VCC is above 4.25 volts, the
following occurs:
A. Periodic Interrupt Enable (PEI) bit is cleared to 0.
B. Alarm Interrupt Enable (AIE) bit is cleared to 0.
C. Update Ended Interrupt Flag (UF) bit is cleared to 0.
D. Interrupt Request Status Flag (IRQF) bit is cleared to 0.
E. Periodic Interrupt Flag (PF) bit is cleared to 0.
F. The device is not accessible until RESET is returned high.
G. Alarm Interrupt Flag (AF) bit is cleared to 0.
H. IRQ pin is in the high impedance state.
I. Square Wave Output Enable ( SQWE ) bit is cleared to 0.
J. Update Ended Interrupt Enable (UIE) is cleared to 0.
K. CEO is driven high.
In a typical application RESET can be connected to VCC. This connection will allow the DS14287 to go in
and out of power fail without affecting any of the control registers.
CEI
(External RAM Chip Enable Input, active low) - CEI should be driven low to enable the external
RAM. CEI is internally pulled up with a 50k
resistor.
CEO
(External RAM Chip Enable Output, active low) - When VCC is greater than 4.25 volts (typical),
CEO
will reflect CEI provided the RESET is at a logic high. When VCC is less than 4.25 volts (typical),
CEO
will be forced to an inactive level regardless of CEI .
VCCO (External RAM Power Supply Output) - VCCO provides the higher of VCC or VBAT through an
internal switch to power an external RAM.
DS14285 Only
X1, X2 - Connections for a standard 32.768 kHz quartz crystal. The internal oscillator circuitry is
designed for operation with a crystal having a specified load capacitance (CL) of 6 pF. The crystal is
connected directly to the X1 and X2 pins. There is no need for external capacitors or resistors. Note: X1
and X2 are very high impedance nodes. It is recommended that they and the crystal be guard–ringed with
ground and that high frequency signals be kept away from the crystal area. For more information on
crystal selection and crystal layout considerations, please consult Application Note 58, “Crystal
Considerations with Dallas Real Time Clocks.”
VBAT – Battery input for any standard 3-volt lithium cell or other energy source. See the Power-Up/Down
section for considerations in selecting the size of the external energy source
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS14285S/T&R | 制造商:Maxim Integrated Products 功能描述:IC RTC W/NV RAM CNTRL 24-SOIC |
| DS14285S/T&R | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS14285S/TR | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Real-Time Clock with NV RAM |
| DS14285S+ | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS14285S+T&R | 制造商:Maxim Integrated Products 功能描述:IC RTC W/NV RAM CNTRL 24-SOIC |
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