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參數(shù)資料
| 型號(hào)： | DS1673E-5/T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CTRLR SYSTEM PORT 5V 20-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 便攜系統(tǒng)控制器 |
| 特點(diǎn)： | 警報(bào)器，閏年，監(jiān)視計(jì)時(shí)器 |
| 時(shí)間格式： | HH:MM:SS（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | 3 線串口 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電壓 - 電源，電池： | 2.5 V ~ 3.7 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
DS1673
18 of 18
Maxim/Dallas Semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim/Dallas Semiconductor product.
No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time.
M a x i m In tegra t ed P r oduc ts , 1 2 0 S a n Ga brie l D r iv e , Sun n y vale , CA 94 086 40 8 - 7 3 7 - 76 00
2005 Maxim Integrated Products
The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corporation.
NOTES:
1.
All voltages are referenced to ground.
2.
Logic 1 voltages are specified at VCC = 3.0V, VOH = VCC for capacitive loads. Excludes RST pin
3.
Logic 0 voltages are specified at VCC = 3.0V, VOL = GND for capacitive loads.
4.
ICCA is specified with outputs open, CS set to a logic 1, SCLK = 500kHz, oscillator enabled, and
D/A converter enabled.
5.
IADC is specified with CS, VCCO open and I/O, SCLK at logic 0. ADC is enabled.
6.
ICCS is specified with CS, VCCO open and I/O, SCLK at logic 0. ADC is disabled.
7.
CS has a 40k
pulldown resistor to ground.
8.
Measured at VIH = 2.0V or VIL = 0.8V and 10ns maximum rise and fall time.
9.
Measured at VOH = 2.4V or VOL = 0.4V.
10.
Load capacitance = 25pF.
11.
ICCO = 100mA, VCC > VCCTP.
12.
VCCO switchover from VCC to VBAT occurs when VCC drops below the lower of VCCSW and VBAT.
13.
Current from VCC input pin to VCCO output pin.
14.
Current from VBAT input pin to VCCO output pin.
15.
Time base is generated by very accurate crystal oscillator. Accuracy of this time period is based on
the crystal that is used. A typical crystal with a specified load capacitance of 6pF will provide an
accuracy within ±100ppm over the 0°C to +70°C temperature range.
16.
If the
EOSC bit in the Control Register is set to a logic 1, t
RPU is equal to 250ms plus the startup
time of the crystal oscillator.
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
20 TSSOP
U20+1
20 SO
W20+3
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