VBAT Battery Input for Standard 3V Lithium Cell or O" />
參數(shù)資料
型號: DS1677E
廠商: Maxim Integrated Products
文件頁數(shù): 12/18頁
文件大?。?/td> 0K
描述: IC CTRLR SYSTEM PORT 20-TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 74
類型: 便攜系統(tǒng)控制器
特點: 警報器,閏年,監(jiān)視計時器
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: 3 線串口
電源電壓: 4.5 V ~ 5.5 V
電壓 - 電源,電池: 2.5 V ~ 3.7 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
DS1677
3 of 18
PIN DESCRIPTION
PIN
NAME
FUNCTION
1
VBAT
Battery Input for Standard 3V Lithium Cell or Other Energy Source. UL recognized to
ensure against reverse charging when used with a lithium battery. Go to www.maxim-
ic.com/qa/info/ul/.
2
VCCO
External SRAM Power Supply Output. This pin is internally connected to VCC when VCC is
within nominal limits. However, during power-fail VCCO is internally connected to the
VBAT pin. Switchover occurs when VCC drops below the lower of VBAT or 2.7V.
3
SCLK
Serial Clock Input. Used to synchronize data movement on the serial interface.
4
I/O
Data Input/Output. This pin is the bidirectional data pin for the 3-wire interface.
5
CS
Chip Select. Must be asserted high during a read or a write for communication over the 3-
wire serial interface. CS has an internal 40k
pulldown resistor.
6
CEI
RAM Chip-Enable In. Must be driven low to enable the external RAM.
7
CEO
RAM Chip-Enable Out Low. Active-low chip-enable output for low-order SRAM byte.
8
N.C.
No Connection
9
INT
Interrupt Output. This pin is an active-high output that can be used as an interrupt input to
a microprocessor. The INT output remains high as long as the status bit causing the
interrupt is present and the corresponding interrupt-enable bit is set. The INT pin operates
when the DS1677 is powered by VCC or VBAT.
10
GND
Ground. DC power is provided to the device on this pin.
11
PFO
Active-Low Power-Fail Output. This pin goes low and sinks current when PFI is less than
1.25V; otherwise this pin remains high.
12
PFI
Active-Low Power-Fail Input. When PFI is less than 1.25V,
PFO goes low; otherwise
PFO
remains high. Connect PFI to GND or VCC when not used.
13
RST
Active-Low Reset. The
RST pin functions as a microprocessor reset signal. This pin is
driven low 1) when VCC is outside of nominal limits; 2) when the watchdog timer has
timed out; 3) during the power up reset period; and 4) in response to a pushbutton reset.
The
RST pin also functions as a pushbutton reset input. When the RST pin is driven low,
the signal is debounced and timed such that a
RST signal of at least 250ms is generated.
This pin has an open-drain output with an internal 47k
pullup resistor.
14,
15, 16
AIN2,
AIN1,
AIN0
Analog Inputs. These pins are the three analog inputs for the 3-channel ADC.
17, 18
X2, X1
Connections for Standard 32.768kHz Quartz Crystal. For greatest accuracy, the DS1670
must be used with a crystal that has a specified load capacitance of 6pF. There is no need
for external capacitors or resistors. Note: X1 and X2 are very high-impedance nodes. It is
recommended that they and the crystal be guard-ringed with ground and that high
frequency signals be kept away from the crystal area. For more information on crystal
selection and crystal layout considerations, refer to Application Note 58: Crystal
Considerations with Dallas Real Time Clocks. The DS1677 does not function without a
crystal.
19
VCC
+5.0V Input DC Power
20
ST
Active-Low Strobe Input. The strobe input pin is used with the watchdog timer. If the
ST
pin is not driven low within the watchdog time period, the
RST pin is driven low.
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