參數資料
型號: DS1856B-050+
廠商: Maxim Integrated Products
文件頁數: 27/31頁
文件大?。?/td> 0K
描述: IC RES TEMP-CNTRL 50/50K 16CSBGA
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
接片: 256
電阻(歐姆): 50k
電路數: 2
溫度系數: 標準值 50 ppm/°C
存儲器類型: 非易失
接口: 2 線串口
電源電壓: 2.85 V ~ 5.5 V
工作溫度: -40°C ~ 95°C
安裝類型: 表面貼裝
封裝/外殼: 16-LBGA,CSPBGA
供應商設備封裝: 16-CSBGA(4x4)
包裝: 托盤
產品目錄頁面: 1435 (CN2011-ZH PDF)
Dual, Temperature-Controlled Resistors with Inter-
nally Calibrated Monitors and Password Protection
Maxim Integrated
5
DS1856
Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum tHD:DAT only has to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.
Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (see the VIH MIN of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 13: CB—total capacitance of one bus line, timing referenced to 0.9 x VCC and 0.1 x VCC.
Note 14: Guaranteed by design.
Typical Operating Characteristics
(VCC = 5.0V, TA = +25°C, for both 50k
Ω and 20kΩ versions, unless otherwise noted.)
TEMPERATURE (
°C)
40
60
80
20
0
-20
650
700
750
800
600
-40
100
SUPPLY CURRENT vs. TEMPERATURE
DS1856
toc01
SUPPLY
CURRENT
A)
SDA = SCL = VCC
SUPPLY CURRENT vs. VOLTAGE
DS1856
toc02
VOLTAGE (V)
SUPPLY
CURRENT
A)
5.0
4.5
4.0
3.5
450
500
600
550
700
650
750
800
400
3.0
5.5
SDA = SCL = VCC
RESISTANCE vs. SETTING
DS1856
toc03
SETTING (DEC)
RESISTANCE
(k
Ω
)
200
150
100
50
10
20
30
40
50
60
0
250
50k
Ω VERSION
RESISTANCE vs. SETTING
DS1856
toc04
SETTING (DEC)
RESISTANCE
(k
Ω
)
200
150
100
50
5
10
15
20
0
250
20k
Ω VERSION
ACTIVE SUPPLY CURRENT
vs. SCL FREQUENCY
DS1856
toc05
SCL FREQUENCY (kHz)
ACTIVE
SUPPLY
CURRENT
A)
300
200
100
720
740
760
780
800
700
0
400
SDA = VCC
RESISTOR 0 INL (LSB)
DS1856
toc06
SETTING (DEC)
RESISTOR
0
INL
(LSB)
225
200
150 175
50 75 100 125
25
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
-1.0
0
250
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