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參數(shù)資料
| 型號(hào)： | DS1868S-50+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 12/14頁 |
| 文件大小： | 0K |
| 描述： | IC POT DIGITAL DUAL 50K 16-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 750 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | 3 線串口 |
| 電源電壓： | 2.7 V ~ 3.3 V，4.5 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
DS1868
7 of 14
DS1868 ABSOLUTE AND RELATIVE LINEARITY Figure 6
TYPICAL APPLICATION CONFIGURATIONS
Figures 7 and 8 show two typical application configurations for the DS1868. By connecting the wiper
terminal of the part to a high impedance load, the effects of the wiper resistance is minimized, since the
wiper resistance can vary from 400 to 1000 ohms, depending on wiper voltage. Figure 7 presents the
device connected in a variable gain amplifier. The gain of the circuit on Figure 7 is given by the following
equation:
AV =
n
-
256
+
where n = 0 to 255
Figure 8 shows the device operating in a fixed gain attenuator where the potentiometer is used to
attenuate an incoming signal. Note the resistance R1 is chosen to be much greater than the wiper
resistance to minimize its effect on circuit gain.
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