參數(shù)資料
型號： DS1878T+T
廠商： Maxim Integrated Products
文件頁數(shù)： 63/101頁
文件大?。?/td> 0K
描述： IC CTLR SFP W/DGTL LDD RX 28TQFN
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
類型： SFP+ 控制器
輸入類型： 模擬，數(shù)字
輸出類型： 數(shù)字
接口： I²C，LDD，串行
電流 - 電源： 2.5mA
安裝類型： 表面貼裝
封裝/外殼： 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 28-TQFN-EP（5x5）
包裝： 帶卷 (TR)
DS1878
SFP+ Controller with Digital LDD Interface
64
______________________________________________________________________________________
FACTORY DEFAULT
80h
READ ACCESS
PW2 or (PW1 and RWTBL246) or (PW1 and RTBL246)
WRITE ACCESS
PW2 or (PW1 and RWTBL246)
MEMORY TYPE
Nonvolatile (SEE)
89h
LOSC
VCCTXF
INV LOS
ASEL
MASK
INVRSOUT
RSELPIN
INVTXF
BIT 7
BIT 0
BIT 7
LOSC: LOS Configuration. Defines the source for the LOSOUT pin (see Figure 16).
0 = LOS LO alarm is used as the source.
1 = (Default) LOS input pin is used as the source.
BIT 6
VCCTXF:
0 = VCC LO Alarm is not masked on power-up. TXFOUT is high on power-on.
1 = VCC LO Alarm is masked on power-on. TXFOUT is low as soon as VCC > VPOD.
BIT 5
INV LOS: Inverts the buffered input pin LOS or LOS LO alarm to output pin LOSOUT (see Figure 16).
0 = Noninverted LOS or LOS LO alarm to LOSOUT pin.
1 = Inverted LOS or LOS LO alarm to LOSOUT pin.
BIT 4
ASEL: Address Select.
0 = Device address is A2h.
1 = Byte DEVICE ADDRESS in Table 02h, Register 8Ch is used as the device address.
BIT 3
MASK:
0 = Alarm-enable row exists at Table 01h, Registers F8h–FFh. Table 05h, Registers F8h–FFh are
empty.
1 = Alarm-enable row exists at Table 05h, Registers F8h–FFh. Table 01h, Registers F8h–FFh are
empty.
BIT 2
INVRSOUT: Allow for inversion of RSELOUT pin (see Figure 16).
0 = RSELOUT is not inverted.
1 = RSELOUT is inverted.
BIT 1
RSELPIN:
0 = Bit 6 of the RXCTRL1 register written to the MAX3945 is programmed by the user.
1 = Bit 6 of the RXCTRL1 register is determined by the RSELOUT pin polarity.
BIT 0
INVTXF: Allow for inversion of signal driven by the TXF input pin.
0 = (Default) TXF signal is not inverted.
1 = TXF signal is inverted.
Table 02h, Register 89h: CNFGA
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