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參數(shù)資料
| 型號： | DS21372TN |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TESTER BIT ERROR 3.3V 32-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS |
| 產(chǎn)品變化通告： | Product Discontinuation 20/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 功能： | 位誤碼率測試器（BERT） |
| 接口： | T1 |
| 電路數(shù)： | 1 |
| 電源電壓： | 3 V ~ 3.6 V |
| 電流 - 電源： | 10mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 托盤 |
| 包括： | 錯誤計數(shù)器，樣式發(fā)生器和檢測器 |
DS21372
11 of 22
REPETITIVE PATTERN GENERATION (PCR.5=0) Table 5
PATTERN TYPE
PTR
PLR
PSR3
PSR2
PSR1
PSR0
TINV
RINV
all 1s
00
FF
0
all 0s
00
FF
FE
0
alternating 1s and 0s
00
01
FF
FE
0
double alternating 1s and 0s
00
03
FF
FC
0
3 in 24
00
17
FF
20
00
22
0
1 in 16
00
0F
FF
00
01
0
1 in 8
00
07
FF
01
0
1 in 4
00
03
FF
F1
0
D4 Line Loopback Activate
00
04
FF
F0
0
D4 Line Loopback Deactivate
00
02
FF
FC
0
Notes For Tables 4 and 5:
1. PTR = Polynomial Tap Register (address = 05)
2. PLR = Pattern Length Register (address = 04)
3. PSR3 = Pattern Set Register 3 (address = 00)
4. PSR2 = Pattern Set Register 2 (address = 01)
5. PSR1 = Pattern Set Register 1 (address = 02)
6. PSR0 = Pattern Set Register 0 (address = 03)
7. TINV = Transmit Data Inversion Select Bit (EIR.5)
8. RINV = Receive Data Inversion Select Bit (EIR.4)
9. For the 2
32 -1 pattern, the random pattern actually repeats every (4093 x 220) + 1046529 bits instead of
2
32 - 1.
8. BIT COUNT REGISTERS
The Bit Count Registers (BCR3 to BCR0) comprise a 32-bit count of bits (actually RCLK cycles)
received at RDATA. BC31 is the MSB of the 32-bit count. The bit counter increments for each cycle of
RCLK when input pin RDIS is low. The bit counter is disabled during loss of SYNC. The Status Register
bit BCOF is set when this 32-bit register overflows. Upon an overflow condition, the user must clear the
BCR by either toggling the LC bit or pin. The DS21372 latches the bit count into the BCR registers and
clears the internal bit count when either the PCR.4 bit or the LC input pin toggles from low to high. The
bit count and bit error count (available via the BECRs) are used by an external processor to compute the
BER performance on a loop or channel basis.
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| DS2141AN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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