參數(shù)資料
型號： DS2141AQ+T&R
廠商： Maxim Integrated Products
文件頁數(shù)： 7/39頁
文件大?。?/td> 0K
描述： IC CONTROLLER T1 5V 44-PLCC
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 500
控制器類型： T1 控制器
接口： 并行/串行
電源電壓： 4.5 V ~ 5.5 V
電流 - 電源： 10mA
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線）
供應(yīng)商設(shè)備封裝： 44-PLCC（16.59x16.59）
包裝： 帶卷 (TR)
DS2141A
15 of 39
SR1: STATUS REGISTER 1 (20h)
(MSB)
(LSB)
LUP
LDN
LOTC
SLIP
RBL
RYEL
RCL
RLOS
SYMBOL
POSITION
NAME AND DESCRIPTION
LUP
SR1.7
Loop Up Code Detected. Set when the repeating …00001…
loop up code is being received.
LDN
SR1.6
Loop Down Code Detected. Set when the repeating …001…
loop down code is being received.
LOTC
SR1.5
Loss of Transmit Clock. Set when the TCLK pin has not
transitioned for one channel time (or 5.2
s). Will force pin-34
high if enabled via CCR1.6. Based on RCLK.
SLIP
SR1.4
Elastic Store Slip Occurrence. Set when the elastic store has
either repeated or deleted a frame of data.
RBL
SR1.3
Receive Blue Alarm. Set when an all 1's code is received at
RPOS and RNEG.
RYEL
SR1.2
Receive Yellow Alarm. Set when a yellow alarm is received at
RPOS and RNEG.
RCL
SR1.1
Receive Carrier Loss. Set when 192 consecutive 0s have been
detected at RPOS and RNEG.
RLOS
SR1.0
Receive Loss of Sync. Set when the device is not synchronized
to the receive T1 stream.
LOOP UP/DOWN CODE DETECTION
Bits SR1.7 and SR1.6 will indicate when either the standard “l(fā)oop up” or “l(fā)oop down” codes are being
received by the DS2141A. When a loop up code has been received for 5 seconds, the CPE is expected to
loop the recovered data (without correcting BPVs) back to the source. The loop down code indicates that
the loopback should be discontinued. See the AT&T publication TR 62411 for more details. The
DS2141A will detect the loop up/down codes in both framed and unframed circumstances with bit error
rates as high as 10-
2. The loop code detector has a nominal integration period of 48 ms. Hence, after about
48 ms of receiving either code, the proper status bit will be set to a 1. After this initial indication, it is
recommended that the software poll the DS2141A every 100 ms to 500 ms until five seconds have
elapsed to insure that the code is continuously present. Once five seconds have passed, the line interface
should be taken into or out of loopback.
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