參數資料
型號: DS2165QN+
廠商: Maxim Integrated Products
文件頁數: 17/17頁
文件大?。?/td> 0K
描述: IC PROC ADPCM 16/24/32K 28-PLCC
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 37
類型: ADPCM 處理器
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應商設備封裝: 28-PLCC(11.51x11.51)
包裝: 管件
產品目錄頁面: 1429 (CN2011-ZH PDF)
DS2165Q
9 of 17
HARDWARE MODE
The hardware mode is intended for applications that do not have an external controller available or do not
require the extended features offered by the serial port. Connecting the SPS pin to VSS disables the serial
port, clears all internal register bits, and maps the IPD, U/ A , and CP/ EX bits for both channels to external
bits (Table 3). In the hardware mode, both the input and output time slots default to time slot 0.
Table 3. HARDWARE MODE
PIN
#
NAME
REGISTER LOCATION
FUNCTION
6A0
CP/ EX
(Channel X)
Channel X Coding Configuration
0 = Expand
1 = Compress
7A1
AS0/AS1/AS2
(Channel X and Y)
Algorithm Select (Table 4)
8A2
U/ A
(Channel X)
Channel X Data Format
0 = A-law
1 =
m-law
9A3
CP/ EX
(Channel Y)
Channel Y Coding Configuration
0 = Expand
1 = Compress
10
A4
AS0/AS1/AS2
(Channel X and Y)
Algorithm Select (Table 4)
11
A5
U/ A
(Channel Y)
Channel Y Data Format
0 = A-law
1 =
m-law
22
SDI
IPD
(Channel Y)
Channel Y Idle Select
0 = Channel Active
1 = Channel Idle
23
CS
IPD
(Channel X)
Channel X Idle Select
0 = Channel Active
1 = Channel Idle
NOTES:
1) SCLK must be connected to VSS when the hardware mode is selected.
2) When both channels are idled, power consumption is significantly reduced.
3) The NIL powers up within 800ms after either channel is returned to active from an idle state.
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