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參數(shù)資料
| 型號(hào)： | DS21Q58L |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 21/74頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX E1 QUAD 3.3V 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS |
| 產(chǎn)品變化通告： | Product Discontinuation 20/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 功能： | 收發(fā)器 |
| 接口： | E1 |
| 電路數(shù)： | 4 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 電流 - 電源： | 230mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤(pán) |
| 包括： | AIS 警報(bào)檢測(cè)器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測(cè)器，遠(yuǎn)程檢測(cè)器和發(fā)生器 |
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DS21Q58 E1 Quad Transceiver
28 of 74
9.1 Interrupt Handling
The host can quickly determine which status registers in the four ports are causing an interrupt by reading one of
the unused addresses such as 0Ch, 0Dh, or 0Eh in any port.
Bit #
7
6
5
4
3
2
1
0
Name
SR2P4
SR1P4
SR2P3
SR1P3
SR2P2
SR1P2
SR2P1
SR1P1
NAME
BIT
FUNCTION
SR2P4
7
Status Register 2, Port 4. A 1 in this bit position indicates that status register 2
in port 4 is asserting an interrupt.
SR1P4
6
Status Register 1, Port 4. A 1 in this bit position indicates that status register 1
in port 4 is asserting an interrupt.
SR2P3
5
Status Register 2, Port 3. A 1 in this bit position indicates that status register 2
in port 3 is asserting an interrupt.
SR1P3
4
Status Register 1, Port 3. A 1 in this bit position indicates that status register 1
in port 3 is asserting an interrupt.
SR2P2
3
Status Register 2, Port 2. A 1 in this bit position indicates that status register 2
in port 2 is asserting an interrupt.
SR1P2
2
Status Register 1, Port 2. A 1 in this bit position indicates that status register 1
in port 2 is asserting an interrupt.
SR2P1
1
Status Register 2, Port 1. A 1 in this bit position indicates that status register 2
in port 1 is asserting an interrupt.
SR1P1
0
Status Register 1, Port 1. A 1 in this bit position indicates that status register 1
in port 1 is asserting an interrupt.
Register Name:
RIR
Register Description:
Receive Information Register
Register Address:
08 Hex
Bit #
7
6
5
4
3
2
1
0
Name
—
JALT
RESF
RESE
CRCRC
FASRC
CASRC
NAME
BIT
FUNCTION
—
7
Unused
—
6
Unused
JALT
5
Jitter Attenuator Limit Trip. Set when the jitter attenuator FIFO reaches to
within 4 bits of its limit; useful for debugging jitter attenuation operation.
RESF
4
Receive Elastic Store Full. Set when the receive elastic store buffer fills and a
frame is deleted.
RESE
3
Receive Elastic Store Empty. Set when the receive elastic store buffer
empties and a frame is repeated.
CRCRC
2
CRC Resync Criteria Met. Set when 915/1000 codewords are received in
error.
FASRC
1
FAS Resync Criteria Met. Set when three consecutive FAS words are
received in error.
CASRC
0
CAS Resync Criteria Met. Set when two consecutive CAS MF alignment
words are received in error.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21Q58L+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q58LN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q58LN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q59 | 制造商:MAXIM 制造商全稱(chēng):Maxim Integrated Products 功能描述:RELIABILITY REPORT FOR DS21Q59, REV A2 |
| DS21Q59DK | 功能描述:網(wǎng)絡(luò)開(kāi)發(fā)工具 DS21Q59 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類(lèi)型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類(lèi)型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
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