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參數(shù)資料
| 型號： | DS2401X1 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 2/11頁 |
| 文件大小： | 0K |
| 描述： | IC SERIAL NUMBER SILICON 2-CSP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 硅序列號 |
| 應(yīng)用： | PCB，網(wǎng)絡(luò)節(jié)點(diǎn)，設(shè)備識別/注冊 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 2-UFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 2-CSP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | DS2401S1DKR |
DS2401
NOTES:
1) All voltages are referenced to ground.
2) VPUP= external pullup voltage.
3) Input load is to ground.
4) An additional reset or communication sequence cannot begin until the reset high time has expired.
5) Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1s of this falling edge and will remain valid for 14s minimum (15s
total from falling edge on 1-Wire bus).
6) VIH is a function of the external pullup resistor and VPUP.
7) 30 nanocoulombs per 72 time slots at 5.0V.
8) At VPUP= 5.0V with a 5k pullup to VPUP and a maximum time slot of 120s.
9) Capacitance on the I/O pin could be 800pF when power is first applied. If a 5k resistor is used to
pullup the I/O line to VPUP, 5s after power has been applied the parasite capacitance will not affect
normal communications.
10) The reset low time (tRSTL) should be restricted to a maximum of 960s, to allow interrupt signaling,
otherwise it could mask or conceal interrupt pulses if this device is used in parallel with a DS2404 or
DS1994.
11) The optimal sampling point for the master is as close as possible to the end time of the tRDV period
without exceeding tRDV. For the case of a Read-One Time slot, this maximizes the amount of time for
the pullup resistor to recover to a high level. For a Read-Zero Time slot, it ensures that a read will
occur before the fastest 1-Wire device(s) releases the line.
12) The duration of the low pulse sent by the master should be a minimum of 1μs with a maximum value
as short as possible to allow time for the pullup resistor to recover the line to a high level before the
1-Wire device samples in the case of a Write-One Time or before the master samples in the case of a
Read-One Time.
PACKAGE INFORMATION
For the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
LAND PATTERN NO.
3 TO-92
(straight leads)
Q3+1
—
3 TO-92
(formed leads)
Q3+4
—
6 TSOC
D6+1
4 SOT-223
K3+1
—
2 Flip Chip
BF211#1
Refer to
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS2405+ | IC SWITCH ADDRESS NCH O-D TO-92 |
| DS2406X | IC SW DL ADDRESS W/1K MEM CSP |
| DS2408S+T&R | IC SWITCH 8-CHAN ADDRESS 16SOIC |
| DS2409P/T&R | IC COUPLER MICROLAN 1-WIRE 6TSOC |
| DS2411P+T&R | IC SILICON SERIAL NUMBER 6TSOC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS2401X1#U | 功能描述:序列號注冊 Silicon Serial Number RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度: 電源電壓-最大: 電源電壓-最小: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| DS2401X1-S | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Silicon Serial Number Unique, Factory-Lasered and Tested 64-Bit |
| DS2401X1-S#T | 功能描述:序列號注冊 Silicon Serial Number RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度: 電源電壓-最大: 電源電壓-最小: 最大工作溫度: 最小工作溫度: 安裝風(fēng)格: 封裝 / 箱體: |
| DS2401X1-T | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Silicon Serial Number Unique, Factory-Lasered and Tested 64-Bit |
| DS2401Y | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Silicon Serial Number |
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