PRELIMINARY
The variables A, B, C, D, E are initialized as follows:
A
:=
67452301h
B
:=
EFCDAB89h
C
:=
98BADCFEh
D
:=
10325476h
E
:=
C3D2E1F0h
DS2432
20 of 30
The 160-bit MAC is the concatenation of A, B, C, D, and E after looping through the following set of
computations for t = 0 to 79 (discarding any carry-out):
TMP :=
S5(A) + ft(B,C,D) + Wt + Kt + E
E
:=
D
D
:=
C
C
:=
S30(B)
B
:=
A
A
:=
TMP
The master can read the Message Authentication Code (MAC) with the Read Authenticated Page com-
mand in a register and bit sequence as shown in Table 3. With the Copy Scratchpad command the bit
transmission sequence is the same, however, the master has to compute the MAC and send it to the
DS2432. With the Compute Next Secret command the MAC is not exposed. Instead, the content of the
SHA computation registers E and D is directly copied to the secret register, as shown in Table 1.
1-WIRE BUS SYSTEM
The 1-Wire bus is a system, which has a single bus master and one or more slaves. In all instances the
DS2432 is a slave device. The bus master is typically a microcontroller. The discussion of this bus system
is broken down into three topics: hardware configuration, transaction sequence, and 1-Wire signaling
(signal types and timing). A 1-Wire protocol defines bus transactions in terms of the bus state during
specific time slots that are initiated on the falling edge of sync pulses from the bus master. For a more
detailed protocol description, refer to Chapter 4 of the Book of DS19xx iButton Standards.
HARDWARE CONFIGURATION
The 1-Wire bus has only a single line by definition; it is important that each device on the bus be able to
drive it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must have open
drain or 3-state outputs. The 1-Wire port of the DS2432 is open drain with an internal circuit equivalent
to that shown in Figure 8. A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At
regular speed the 1-Wire bus has a maximum data rate of 16.3k bits per second. The speed can be boosted
to 142k bits per second by activating the Overdrive Mode. The DS2432 requires a 1-Wire pull-up resistor
of maximum 2.2 k
for executing any of its memory and SHA function commands at any speed. When
communicating with several DS2432 simultaneously, e. g., to install the same secret in several devices,
the resistor should be bypassed by a low-impedance pull-up to V
PUP
while the device transfers data from
the scratchpad to the EEPROM and updates the tamper-detect register.
The idle state for the 1-Wire bus is high. If for any reason a transaction needs to be suspended, the bus
MUST be left in the idle state if the transaction is to resume. If this does not occur and the bus is left low
for more than 16 μs (Overdrive Speed) or more than 120 μs (regular speed), one or more devices on the
bus may be reset.