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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | DS3231MZ/V+ |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 8/20闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC REAL TIME CLOCK I2C 8SO |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 100 |
| 椤�(l猫i)鍨嬶細 | 鏅�(sh铆)閻�/鏃ユ |
| 鐗归粸(di菐n)锛� | 璀﹀牨(b脿o)鍣�锛岄枏骞�锛屾柟娉㈣几鍑� |
| 鏅�(sh铆)闁撴牸寮忥細 | HH:MM:SS锛�12/24 灏忔檪(sh铆)锛� |
| 鏁�(sh霉)鎿�(j霉)鏍煎紡锛� | YY-MM-DD-dd |
| 鎺ュ彛锛� | I²C锛�2 绶�(xi脿n)涓插彛 |
| 闆绘簮闆诲锛� | 2.3 V ~ 5.5 V |
| 闆诲 - 闆绘簮锛岄浕姹狅細 | 2.3 V ~ 5.5 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤�(l猫i)鍨嬶細 | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 8-SOIC |
| 鍖呰锛� | 绠′欢 |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)鐣�(d膩ng)鍓嶇8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)绗�15闋�(y猫)绗�16闋�(y猫)绗�17闋�(y猫)绗�18闋�(y猫)绗�19闋�(y猫)绗�20闋�(y猫)
卤5ppm, I2C Real-Time Clock
16
Maxim Integrated
DS3231M
I2C Serial Port Operation
I2C Slave Address
The device鈥檚 slave address byte is D0h. The first byte
sent to the device includes the device identifier, device
address, and the R/W bit (Figure 8). The device address
sent by the I2C master must match the address assigned
to the device.
I2C Definitions
The following terminology is commonly used to describe
I2C data transfers.
Master Device: The master device controls the slave
devices on the bus. The master device generates
SCL clock pulses and START and STOP conditions.
Slave Devices: Slave devices send and receive data
at the master鈥檚 request.
Bus Idle or Not Busy: Time between STOP and
START conditions when both SDA and SCL are
inactive and in their logic-high states. When the bus
is idle, it often initiates a low-power mode for slave
devices.
START Condition: A START condition is generated
by the master to initiate a new data transfer with a
slave. Transitioning SDA from high to low while SCL
remains high generates a START condition. See
Figure 1 for applicable timing.
STOP Condition: A STOP condition is generated
by the master to end a data transfer with a slave.
Transitioning SDA from low to high while SCL remains
high generates a STOP condition. See Figure 1 for
applicable timing.
Repeated START Condition: The master can use
a repeated START condition at the end of one data
transfer to indicate that it immediately initiates a new
data transfer following the current one. Repeated
STARTs are commonly used during read operations
to identify a specific memory address to begin a data
transfer. A repeated START condition is issued iden-
tically to a normal START condition. See Figure 1 for
applicable timing.
Temperature Registers (11h-12h)
Figure 8. I2C Slave Address Byte
11
1
0R/W
0
MSB
LSB
READ/
WRITE BIT
DEVICE
IDENTIFIER
Temperature Register (Upper Byte = 11h)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
SIGN
DATA
0
Temperature Register (Lower Byte = 12h)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
DATA
0
Temperature is represented as a 10-bit code with a resolution of 0.25掳C and is accessible at location 11h and 12h. The tem-
perature is encoded in two鈥檚 complement format. The upper 8 bits, the integer portion, are at location 11h and the lower 2 bits,
the fractional portion, are at location 12h. For example, 00011001 01b = +25.25掳C. Upon power reset, the registers are set to
a default temperature of 0掳C and the controller starts a temperature conversion. The temperature is read upon initial applica-
tion of VCC or I2C access on VBAT and once every second afterwards with VCC power or once every 10s with VBAT power. The
Temperature registers are also updated after each user-initiated conversion and are read only.
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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| DS1844E-050+ | IC POT DIG QUAD 50K 20-TSSOP |
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| VI-B2W-MY-F2 | CONVERTER MOD DC/DC 5.5V 50W |
| VI-B32-MV | CONVERTER MOD DC/DC 15V 150W |
| VI-B2V-MY-F4 | CONVERTER MOD DC/DC 5.8V 50W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| DS3231N/DIP | 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪: 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪: |
| DS3231S | 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� Integrated RTC/TCXO/Crystal RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔(xi脿n)鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜(ch菙)瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube |
| DS3231S- | 鍒堕€犲晢:MAXIM 鍒堕€犲晢鍏ㄧū(ch膿ng):Maxim Integrated Products 鍔熻兘鎻忚堪:Extremely Accurate I2C-Integrated |
| DS3231S# | 鍔熻兘鎻忚堪:瀵�(sh铆)鏅�(sh铆)鏅�(sh铆)閻� Integrated RTC/TCXO/Crystal RoHS:鍚� 鍒堕€犲晢:Microchip Technology 鍔熻兘:Clock, Calendar. Alarm RTC 绺界窔(xi脿n)鎺ュ彛:I2C 鏃ユ湡鏍煎紡:DW:DM:M:Y 鏅�(sh铆)闁撴牸寮�:HH:MM:SS RTC 瀛樺劜(ch菙)瀹归噺:64 B 闆绘簮闆诲-鏈€澶�:5.5 V 闆绘簮闆诲-鏈€灏�:1.8 V 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�: 瀹夎棰�(f膿ng)鏍�:Through Hole 灏佽 / 绠遍珨:PDIP-8 灏佽:Tube |
| DS3231S#T&R | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:REAL TIME CLOCK SERL 16SOIC W - Tape and Reel 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:REAL TIME CLOCK SERL 16SOIC W - Cut TR (SOS) 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:IC RTC W/TCXO 16-SOIC 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:Real Time Clock Integrated RTC/TCXO/Crystal |
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