±5ppm, I2C Real-Time Clock 10 Maxim Integrated DS3231M by V
參數(shù)資料
型號: DS3231MZ/V+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/20頁
文件大小: 0K
描述: IC RTC I2C MEMS W/ALARM 8SO
標準包裝: 2,500
類型: 時鐘/日歷
特點: 警報器,閏年,方波輸出
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.3 V ~ 5.5 V
電壓 - 電源,電池: 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
±5ppm, I2C Real-Time Clock
10
Maxim Integrated
DS3231M
by VCC. If VCC is less than VPF and is less than VBAT, the
device is powered by VBAT (see Table 1).
When VCC < VPF, the RST output is asserted (active
low). When VCC is the presently selected power source,
temperature conversions are executed once per second.
When VBAT is the presently selected power source, tem-
perature conversions are executed once every 10s.
To preserve the battery, the first time VBAT is applied
to the device the oscillator does not start up until VCC
exceeds VPF or until a valid I2C address is written to
the device. Typical oscillator startup time is less than
1s. Approximately 2s after VCC is applied, or a valid
I2C address is written, the device makes a temperature
measurement and applies the calculated correction to
the oscillator. Once the oscillator is running, it continues
to run as long as a valid power source is available (VCC
or VBAT), and the device continues to measure the tem-
perature and correct the oscillator frequency. On the first
application of VCC power, or (if VBAT powered) when a
valid I2C address is written to the device, the time and
date registers are reset to 01/01/00 01 00:00:00 (DD/MM/
YY DOW HH:MM:SS).
VBAT Operation
There are several modes of operation that affect the
amount of VBAT current that is drawn. While the device
is powered by VBAT and the serial interface is active,
the active battery current IBATA is drawn. When the
serial interface is inactive, the timekeeping current IBATT
(which includes the averaged temperature-conversion
current IBATTC) is used. The temperature-conversion
current IBATTC is specified since the system must be
able to support the periodic higher current pulse and
still maintain a valid voltage level. The data-retention
current IBATDR is the current drawn by the device when
the oscillator is stopped (EOSC = 1). This mode can be
used to minimize battery requirements for periods when
maintaining time and date information is not necessary,
e.g., while the end system is waiting to be shipped to a
customer.
Pushbutton Reset Function
The device provides for a pushbutton switch to be con-
nected to the RST input/output pin. When the device is
not in a reset cycle, it continuously monitors RST for a
low-going edge. If an edge transition is detected, the
device debounces the switch by pulling RST low. After
the internal timer has expired (PBDB), the device con-
tinues to monitor the RST line. If the line is still low, the
device continuously monitors the line looking for a rising
edge. Upon detecting release, the device forces RST
low and holds it low for tRST. RST is also used to indicate
a power-fail condition. When VCC is lower than VPF, an
internal power-fail signal is generated, which forces RST
low. When VCC returns to a level above VPF, RST is held
low for approximately 250ms (tREC) to allow the power
supply to stabilize. If the oscillator is not running when
VCC is applied, tREC is bypassed and RST immedi-
ately goes high. Assertion of the RST output, whether by
pushbutton or power-fail detection, does not affect the
device’s internal operation. RST output operation and
pushbutton monitoring are only available if VCC power
is available.
Real-Time Clock (RTC)
With the 1Hz source from the temperature-compensated
oscillator, the RTC provides seconds, minutes, hours,
day, date, month, and year information. The date at the
end of the month is automatically adjusted for months
with fewer than 31 days, including corrections for leap
year. The clock operates in either the 24-hour or the
12-hour format with an AM/PM indicator. The clock pro-
vides two programmable time-of-day alarms. INT/SQW
can be enabled to generate either an interrupt due to an
alarm condition or a 1Hz square wave. This selection is
controlled by the INTCN bit in the Control register.
I2C Interface
The I2C interface is accessible whenever either VCC or
VBAT is at a valid level. If a microcontroller connected
to the device resets because of a loss of VCC or other
event, it is possible that the microcontroller and device’s
I2C communications could become unsynchronized,
e.g., the microcontroller resets while reading data from
the device. When the microcontroller resets, the device’s
I2C interface can be placed into a known state by tog-
gling SCL until SDA is observed to be at a high level. At
that point the microcontroller should pull SDA low while
SCL is high, generating a START condition.
Address Map
Table 2 shows the address map for the device’s time-
keeping registers. During a multibyte access, when the
address pointer reaches the end of the register space
(12h), it wraps around to location 00h. On an I2C START
or address pointer incrementing to location 00h, the cur-
rent time is transferred to a second set of registers. The
time information is read from these secondary registers,
while the clock can continue to run. This eliminates the
need to reread the registers in case the main registers
update during a read.
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