±5ppm, I2C Real-Time Clock with SRAM 8 Maxim Integrated Pin Configuratio" />
參數(shù)資料
型號: DS3232MZ+
廠商: Maxim Integrated Products
文件頁數(shù): 22/23頁
文件大小: 0K
描述: IC RTC W/SRAM I2C 8SOIC
標準包裝: 100
類型: 時鐘/日歷
特點: 警報器,閏年,方波輸出,SRAM
存儲容量: 236B
時間格式: HH:MM:SS(12/24 小時)
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.3 V ~ 4.5 V
電壓 - 電源,電池: 2.3 V ~ 4.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 管件
DS3232M
±5ppm, I2C Real-Time Clock with SRAM
8
Maxim Integrated
Pin Configuration
Pin Description
PIN
NAME
FUNCTION
1
32KHZ
32.768KHZ Output (Push-Pull Output, 50% Duty Cycle). If enabled (EN32KHZ = 1), the 32kHz output is
active on VCC. If enabled for battery operation (BB32KHZ = 1), the output is also active on VBAT. When
disabled, the output is forced low. This pin can be left unconnected if not used.
2
VCC
DC Power Pin for Primary Power Supply. This pin should be decoupled using a 0.1FF to 1.0FF capacitor.
Connect to ground if not used.
3
INT/
SQW
Active-Low Interrupt or 1Hz Square-Wave Output. This open-drain pin requires an external pullup resistor
connected to a supply at 4.5V or less. It can be left open if not used. This multifunction pin is determined
by the state of the INTCN bit in the Control register (0Eh). When INTCN is set to logic 0, this pin outputs
a 1Hz square wave. When INTCN is set to logic 1, a match between the timekeeping registers and either
of the alarm registers activates the INT/SQW pin (if the alarm is enabled). Because the INTCN bit is set to
logic 1 when power is first applied, the pin defaults to an interrupt output with alarms disabled.
4
RST
Active-Low Reset. This pin is an open-drain input/output. It indicates the status of VCC relative to the VPF
specification. As VCC falls below VPF, the RST pin is driven low. When VCC exceeds VPF, for tRST, the
RST pin is pulled high by the internal pullup resistor. The active-low, open-drain output is combined with
a debounced pushbutton input function. This pin can be activated by a pushbutton reset request. It has
an internal 50kI (RPU) nominal value pullup resistor to VCC. No external pullup resistors should be con-
nected. If the oscillator is disabled, tREC is bypassed and RST immediately goes high.
5
GND
Ground
6
VBAT
Backup Power-Supply Input. When using the device with the VBAT input as the primary power source, this
pin should be decoupled using a 0.1FF to 1.0FF low-leakage capacitor. When using the device with the VBAT
input as the backup power source, the capacitor is not required. If VBAT is not used, connect to ground. The
device is UL recognized to ensure against reverse charging when used with a primary lithium battery. Go to
7
SDA
Serial-Data Input/Output. This pin is the data input/output for the I2C serial interface. This open-drain pin
requires an external pullup resistor. The pullup voltage can be up to 4.5V, regardless of the voltage on VCC.
8
SCL
Serial-Clock Input. This pin is the clock input for the I2C serial interface and is used to synchronize data
movement on the serial interface. The pullup voltage can be up to 4.5V, regardless of the voltage on VCC.
DS3232M
VBAT
GND
RST
1
2
8
7
SCL
SDA
VCC
INT/SQW
32KHZ
SO
TOP VIEW
3
4
6
5
+
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