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參數(shù)資料
| 型號： | DS3245 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 107K |
| 代理商： | DS3245 |
Switching Characteristics
T
A
e
0
§
C to
a
75
§
C, V
CC
e
5V
g
5%, V
DD
e
12V
g
5%
Symbol
Parameter
Conditions
Min
(1)
Typ
(2,4)
Max
(3)
Units
t
ba
Input to Output Delay
R
SERIES
e
0
5
11
ns
t
DR
Delay Plus Rise Time
R
SERIES
e
0
20
32
ns
t
ab
Input to Output Delay
R
SERIES
e
0
3
7
ns
t
DF
Delay Plus Fall Time
R
SERIES
e
0
18
32
ns
t
T
Output Transition Time
R
SERIES
e
20
X
10
17
25
ns
t
DR
Note 3:
C
L
e
250 pF
Note 4:
Typical values are measured at 25
§
C.
Note 5:
This parameter is periodically sampled and is not 100% tested. Condition of measurement is f
e
1 MHz, V
BIAS
e
2V, V
CC
e
0V, and T
A
e
25
§
C.
Delay Plus Rise Time
R
SERIES
e
20
X
27
38
ns
t
DF
Delay Plus Fall Time
R
SERIES
e
20
X
25
38
ns
Capacitance
T
A
e
25
§
C
(5)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
C
IN
Input Capacitance, I
1
, I
2
, I
3
, I
4
5
8
pF
C
IN
Input Capacitance, R, C, E1, E2
8
12
pF
Note 1:
C
L
e
150 pF
Note 2:
C
L
e
200 pF
These values represent a range of total stray plus clock capacitance for nine 4k RAMs.
AC Test Circuit and Switching Time Waveforms
Input pulse amplitudes: 3V
Input pulse rise and fall times:
5 ns between 1V and 2V
Measurements points: see waveforms
TL/F/5873–3
TL/F/5873–4
3
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PDF描述 |
|---|---|
| DS3245J | Quad Clock Driver |
| DS3245N | Quad Clock Driver |
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| DS3251N | Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs |
| DS3252 | Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS3245J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad Clock Driver |
| DS3245J/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad Clock Driver |
| DS3245N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad Clock Driver |
| DS3245N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Quad Clock Driver |
| DS-324PIN | 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:Flatpack Four-Way Power Divider, 25 - 1000 MHz |
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