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| 型號(hào)： | DS32512N# |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 46/130頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU DS3/E3/STS-1 484-BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 類型： | 線路接口裝置（LIU） |
| 規(guī)程： | DS3 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 484-BGA |
| 供應(yīng)商設(shè)備封裝： | 484-BGA（23x23） |
| 包裝： | 管件 |
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DS32506/DS32508/DS32512
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Table 7-7. SPI Serial Interface Pin Descriptions
NAME
TYPE
FUNCTION
CS
I
Chip Select (Active Low). This pin must be asserted to read or write internal registers.
See Section 8.9.
SCLK
I
Serial Clock. SCLK is always driven by the SPI bus master. See Section 8.9.
SDI
I
Serial Data Input. The SPI bus master transmits data to the device on this pin.
See Section 8.9.
SDO
O
Serial Data Output. The device transmits data to the SPI bus master on this pin.
See Section 8.9.
CPHA
I
Clock Phase. See Section 8.9.
0 = Data is latched on the leading edge of the SCLK pulse
1 = Data is latched on the trailing edge of the SCLK pulse
CPOL
I
Clock Polarity. See Section 8.9.
0 = SCLK is normally low and pulses high during bus transactions
1 = SCLK is normally high and pulses low during bus transactions
INT
Oz
Interrupt Output (Active Low, Open Drain).
See
INT pin description in Table 7-6.
GPIOAn
I/Opd
GPIOBn
I/Opd
Table 7-8. CLAD Pin Descriptions
NAME
TYPE
FUNCTION
REFCLK
I
Reference Clock. The signal on this pin is the input reference clock to the CLAD and
must be transmission quality (
±20ppm, low jitter). In hardware mode, REFCLK must be
19.44MHz. In bus interface modes, REFCLK can be any of several frequencies. See
Section 8.7.1.
CLKA
I/O
Clock A—DS3 44.736MHz. When the CLAD is bypassed, a transmission-quality DS3
clock (44.736MHz
±20ppm, low jitter) must be connected to this pin if any of the LIUs are
to operate in DS3 mode. When the CLAD is enabled this pin can be configured to output
the DS3 clock synthesized by PLL-A. See Section 8.7.1.
CLKB
I/O
Clock B—E3 34.368MHz. When the CLAD is bypassed, a transmission-quality E3 clock
(34.368MHz
±20ppm, low jitter) must be connected to this pin if any of the LIUs are to
operate in E3 mode. When the CLAD is enabled, this pin can be configured to output the
E3 clock synthesized by PLL-B. See Section 8.7.1.
CLKC
I/O
Clock C—STS-1 51.84MHz. When the CLAD is bypassed, a transmission-quality STS-1
clock (51.84MHz
±20ppm, low jitter) must be connected to this pin if any of the LIUs are
to operate in STS-1 mode. When the CLAD is enabled, this pin can be configured to
output the STS-1 clock synthesized by PLL-C. See Section 8.7.1.
CLKD
O
Clock D—Telecom Bus 77.76MHz or 19.44MHz. When the CLAD is bypassed, this pin
is driven low. When the CLAD is enabled this pin can output a 77.76MHz or 19.44MHz
clock synthesized by PLL-D. See Section 8.7.1.
CLADBYP
I
CLAD Bypass Control. This pin controls whether the CLAD is used or bypassed. When
a microprocessor interface is enabled (IFSEL
≠ 000), CLADBYP should be wired low to
allow use of the GLOBAL.CR2:CLAD[6:0] field to control the CLAD. See Section 8.7.1.
0 = Synthesize the DS3, E3, and STS-1 clocks from the clock on the REFCLK pin.
1 = Source the DS3, E3, and STS-1 clocks from the CLKA, CLKB and CLKC pins.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS32512N# | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS32512N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 12-Port DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS32512NA2 | 制造商:Maxim Integrated Products 功能描述:DS32512 X12 DS3/E3 LIU REVA2 IND - Rail/Tube |
| DS32512NW | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS32512W | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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