參數(shù)資料
型號： DS3252N
英文描述： Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
中文描述： 單/雙/三/四DS3/E3/STS-1柳斯
文件頁數(shù)： 11/71頁
文件大?。?/td> 925K
代理商： DS3252N
DS3251/DS3252/DS3253/DS3254
11 of 71
Table 6-B. Receiver Pin Descriptions
Note:
These pins are always active.
NAME
TYPE
RXPn,
RXNn
through a 1:2 step-up transformer (
Figure 2-1
).
Receiver Clock.
The recovered clock is output on the RCLK pin. Recovered data is output on the
RPOS/RDAT and RNEG/RLCV pins on the falling edge of RCLK (RCINV = 0) or the rising edge of
RCLK (RCINV = 1). During a loss of signal (
RLOS
= 0), the RCLK output signal is derived from the
LIU’s master clock.
Receiver Positive AMI/Receiver Data.
When the receiver is configured to have a bipolar interface
(RBIN = 0), RPOS pulses high for each positive AMI pulse received. When the receiver is configured
to have a binary interface (RBIN = 1), RDAT outputs decoded binary data. RPOS/RDAT is updated
either on the falling edge of RCLK (RCINV = 0) or the rising edge of RCLK (RCINV = 1).
Receiver Negative AMI/Line-Code Violation.
When the receiver is configured to have a bipolar
interface (RBIN = 0), RNEG pulses high for each negative AMI pulse received. When the receiver is
configured to have a binary interface (RBIN = 1), RLCV pulses high to flag code violations. See
Section
8.6
for further details on code violations. RNEG/RLCV is updated either on the falling edge of
RCLK (RCINV = 0) or the rising edge of RCLK (RCINV = 1).
Receiver Tri-State Enable (Active Low).
RTS
tri-states the RPOS/RDAT, RNEG/RLCV, and RCLK
receiver outputs. This feature supports applications requiring LIU redundancy. Receiver outputs from
multiple LIUs can be wire-ORed together, eliminating the need for external switches or muxes. The
receiver continues to operate internally when
RTS
is low.
0 = tri-state the receiver outputs
1 = enable the receiver outputs
Receiver Loss of Signal (Active Low, Open Drain).
RLOS
is asserted upon detection of 175 75
consecutive zeros in the receive data stream.
RLOS
is deasserted when there are no excessive zero
occurrences over a span of 175 75 clock periods. An excessive zero occurrence is defined as three
or more consecutive zeros in the DS3 and STS-1 modes or four or more zeros in the E3 mode. See
Section
8.5
for more information.
PRBS Detector Output.
This signal reports the status of the PRBS detector. See Section
11
for
further details.
Table 6-C. Transmitter Pin Descriptions
Note:
These pins are always active.
NAME
TYPE
Transmitter Clock.
A DS3 (44.736MHz 20ppm), E3 (34.368MHz 20ppm), or STS-1 (51.840MHz
20ppm) clock should be applied at this signal. Data to be transmitted is clocked into the device at
TPOS/TDAT and TNEG either on the rising edge of TCLK (TCINV = 0) or the falling edge of TCLK
(TCINV = 1). See Section
9
for additional details.
Transmitter Positive AMI/Transmitter Data.
When the transmitter is configured to have a bipolar
interface (TBIN = 0), a positive pulse is transmitted on the line when TPOS is high. When the
transmitter is configured to have a binary interface (TBIN = 1), the data on TDAT is transmitted after
B3ZS or HDB3 encoding. TPOS/TDAT is sampled either on the rising edge of TCLK (TCINV = 0) or
on the falling edge of TCLK (TCINV = 1).
Transmitter Negative AMI.
When the transmitter is configured to have a bipolar interface (TBIN = 0),
a negative pulse is transmitted on the line when TNEG is high. When the transmitter is configured to
have a binary interface (TBIN = 1), TNEG is ignored and should be wired either high or low. TNEG is
sampled either on the rising edge of TCLK (TCINV = 0) or on the falling edge of TCLK (TCINV = 1).
Transmitter Analog Outputs.
These differential AMI outputs are coupled to the outbound 75
coaxial cable through a 2:1 step-down transformer (
Figure 2-1
). These outputs can be tri-stated using
the
TTS
pin or the TTS or TPS configuration bits.
Transmitter Driver Monitor (Active Low, Open Drain).
TDM
reports the status of the transmit driver
monitor. When the monitor detects a faulty transmitter,
TDM
is driven low.
TDM
requires an external
pullup to V
DD
. See Section
9.6
for more information.
Transmitter Tri-State Enable (Active Low).
TTS
tri-states the transmitter outputs (TXP and TXN).
This feature supports applications requiring LIU redundancy. Transmitter outputs from multiple LIUs
can be wire-ORed together, eliminating external switches. The transmitter continues to operate
internally when
TTS
is active.
0 = tri-state the transmitter output driver
1 = enable the transmitter output driver
FUNCTION
I
Receiver Analog Inputs.
These differential AMI inputs are coupled to the inbound 75 coaxial cable
RCLKn
O3
RPOSn/
RDATn
O3
RNEGn/
RLCVn
O3
RTSn
I
RLOSn
O
PRBSn
O
FUNCTION
TCLKn
I
TPOSn/
TDATn
I
TNEGn
I
TXPn,
TXNn
O3
TDMn
O
TTSn
I
相關(guān)PDF資料
PDF描述
DS3253 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS3252N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Dual DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3252NA3 制造商:Maxim Integrated Products 功能描述:DS3252N REV A3 - Rail/Tube
DS3253 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3253+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS3253A3 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Triple DS3/E3/STS-1 Line Interface Unit RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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