參數(shù)資料
型號: DS3906U+T&R
廠商: Maxim Integrated Products
文件頁數(shù): 13/14頁
文件大?。?/td> 0K
描述: IC RESIST VAR TRPL 10USOP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 3,000
接片: 64
電阻(歐姆): 1.45k,2.54k,2.54k
電路數(shù): 3
溫度系數(shù): 標準值 60 ppm/°C
存儲器類型: 非易失
接口: I²C(設備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應商設備封裝: 10-µMAX
包裝: 帶卷 (TR)
DS3906
Triple NV Low Step Size Variable
Resistor Plus Memory
8
_____________________________________________________________________
ADDRESS
TYPE
NAME
FUNCTION
FACTORY
DEFAULT
00h to 0Fh
EEPROM
User memory
16 bytes of general-purpose user EEPROM.
00h
F8h
EEPROM
Resistor 0
3Fh
F9h
EEPROM
Resistor 1
3Fh
FAh
EEPROM
Resistor 2
Resistor 0-2 settings. See Table 2 and the Resistor
Registers/Settings section.
3Fh
FBh-FFh
Reserved
Table 1. DS3906 Memory Map
ADDRESS
VARIABLE RESISTOR
POSITION 3FH RESISTANCE
(k
)
NUMBER OF POSITIONS*
F8h
Resistor 0
2.54
F9h
Resistor 1
2.54
FAh
Resistor 2
1.45
64 (00h to 3Fh) + High-Z
Table 2. DS3906 Resistor Registers
* Writing a value greater than 3Fh to any of the resistor registers makes the corresponding resistor go High-Z. Position 3Fh is the
maximum position.
makes the corresponding resistor go High-Z. Plots for
both resistor sizes are shown on the front page of this
data sheet. It can be seen that, when an external resis-
tor is connected in parallel with the DS3906’s resistors,
the effective resistance is linear and capable of achiev-
ing sub-ohm and ohm steps.
The resistor settings are stored in EEPROM memory. It
is important to point out that the DS3906 EEPROM is
organized in 2-byte pages. This is transparent when
reading from the device or when performing single byte
writes. However, this limits the maximum number of
bytes that can be written in one I2C transaction to two.
Furthermore, the multiple byte writes must begin on
even memory addresses (00h, 02h, …., F8h, etc).
Additional information is provided later in the I2C
Communication section . Example communication
transactions are provided in Figure 3.
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