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參數(shù)資料
| 型號： | DS4026S+WCN |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OSC TCXO 25MHZ 16-SOIC |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 45 |
| 類型： | 溫度 - 補償晶體振蕩器（TCXO） |
| 頻率： | 25MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 電流 - 電源： | 1.5mA |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 包裝： | 管件 |
| 供應商設備封裝： | 16-SOIC W |
| 安裝類型： | 表面貼裝 |
DS4026
10MHz to 51.84MHz TCXO
_______________________________________________________________________________________
9
The output driver is a CMOS square-wave output with
symmetrical rise and fall time.
The temperature sensor provides a 12-bit temperature
reading with a resolution of 0.0625°C. The sensor is in
continuous conversion mode. If DCOMP is set, conver-
sions continue but temperature updates are inhibited.
The controller coordinates the conversion of tempera-
ture into digital codes. When the temperature reading is
different from the previous one or the frequency tuning
register is changed, the controller looks up the two cor-
responding capacitance trim codes from the lookup
table at a 0.5°C increment. The trim codes are interpo-
lated to 0.0625°C resolution.
The result is added with the tuning value from the fre-
quency tuning register and loaded into the DAC regis-
ters to adjust voltage output. The monotonic DAC
provides an analog voltage based on temperature
compensation to drive the variable capacitor.
The DS4026 operates as a slave device on the serial
bus. Access is obtained by implementing a START
condition and providing a device identification code fol-
lowed by data. Subsequent registers can be accessed
sequentially until a STOP condition is executed.
Address Map
Disable Compensation Update (DCOMP)
DCOMP is bit 7 of the frequency tuning register (see
the
Frequency Tuning Register (00h–01h), POR = 00h
table). When set to logic 1, this bit’s temperature-com-
pensation function is disabled. This disabling prevents
the variable capacitor in the oscillator block from
changing. However, the temperature register still per-
forms temperature conversions. The temperature trim
code from the last temperature conversion before
DCOMP is enabled is used for temperature compensa-
tion. The FTUNE registers are still functional when
DCOMP is disabled.
The frequency tuning registers adjust the base frequen-
cy. The frequency tuning value is represented in two’s
complement data. Bit 6 of FTUNEH is the sign, bit 5 is
the MSB, and bit 0 of FTUNEL is the LSB (see Table 1).
When the tuning register low (01h) is programmed with
a value, the next temperature update cycle sums the
programmed value with the factory compensated
value. This allows the user to digitally control the base
frequency using the I2C protocol.
These frequency tuning register bits allow the tuning of
the base frequency. Each bit typically represents
about 1ppb (typ). For FTUNEH = 3Fh and FTUNEL =
FFh, the device pushes the base frequency by approx-
imately +15ppm.
Frequency Tuning Register (00h–01h), POR = 00h
ADDRESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
00h
DCOMP
Sign
Data
POR
0
01h
Data
POR
0
Temperature Register (02h–03h)
ADDRESS
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
02h
Sign
Data
POR
0
03h
Data
0
POR
0
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