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參數(shù)資料
型號: DS5001FP-16N
廠商: Maxim Integrated Products
文件頁數(shù): 13/27頁
文件大小: 0K
描述: IC MPU 128K 16MHZ IND 80-TQFP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 66
系列: DS500x
核心處理器: 8051
芯體尺寸: 8-位
速度: 16MHz
連通性: EBI/EMI,SIO,UART/USART
外圍設備: 電源故障復位,WDT
輸入/輸出數(shù): 32
程序存儲器類型: SRAM
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-BQFP
包裝: 托盤
DS5001FP
20 of 27
AC CHARACTERISTICS: BYTE-WIDE ADDRESS/DATA BUS TIMING
(VCC = 5V ±10%, TA = 0°C to +70°C.)
#
PARAMETER
SYMBOL
MIN
MAX
UNITS
40
Delay to Byte-Wide Address Valid from
CE1
, CE2 , or CE1N Low During Op Code Fetch
tCE1LPA
30
ns
41
Pulse Width of CE 1-4, PE 1-4 or CE1N
tCEPW
4tCLK - 35
ns
42
Byte-Wide Address Hold After CE1 , CE2 , or
CE1N
High During Op Code Fetch
tCE1HPA
2tCLK - 20
ns
43
Byte-Wide Data Setup to CE1 , CE2 , or CE1N
High During Op Code Fetch
tOVCE1H
1tCLK + 40
ns
44
Byte-Wide Data Hold After CE1 , CE2 or CE1N
High During Op Code Fetch
tCE1HOV
0
ns
45
Byte-Wide Address Hold After CE 1-4,
PE
1-4, or CE1N High During MOVX
tCEHDA
4tCLK - 30
ns
46
Delay from Byte-Wide Address Valid
CE
1-4, PE 1-4, or CE1N Low During MOVX
tCELDA
4tCLK - 35
ns
47
Byte-Wide Data Setup to CE 1-4, PE 1-4, or
CE1N
High During MOVX (read)
tDACEH
1tCLK + 40
ns
48
Byte-Wide Data Hold After CE 1-4,
PE
1-4, or CE1N High During MOVX (read)
tCEHDV
0
ns
49
Byte-Wide Address Valid to R/ W Active
During MOVX (write)
tAVRWL
3tCLK - 35
ns
50
Delay from R/ W Low to Valid Data Out
During MOVX (write)
tRWLDV
20
ns
51
Valid Data-Out Hold Time from CE 1-4,
PE
1-4, or CE1N High
tCEHDV
1tCLK - 15
ns
52
Valid Data-Out Hold Time from R/ W High
tRWHDV
0
ns
53
Write Pulse Width (R/ W Low Time)
tRWLPW
6tCLK - 20
ns
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