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參數資料
| 型號： | DS80C320-QNL+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 37/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 33MHZ HS/LP 44-PLCC |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 500 |
| 系列： | 80C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SIO，UART/USART |
| 外圍設備： | 電源故障復位，WDT |
| 輸入/輸出數： | 32 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 包裝： | 帶卷 (TR) |
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DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
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INSTRUCTION SET SUMMARY
All instructions in the DS80C320/DS80C323 perform the same functions as their 80C32 counterparts.
Their effect on bits, flags, and other status functions is identical. However, the timing of each instruction
is different. This applies both in absolute and relative number of clocks.
For absolute timing of real-time events, the timing of software loops will need to be calculated using the
Table 1. However, counter/timers default to run at the older 12 clocks per increment. Therefore, while
software runs at higher speed, timer-based events need no modification to operate as before. Timers can
be set to run at 4 clocks per increment cycle to take advantage of higher speed operation.
The relative time of two instructions might be different in the new architecture than it was previously. For
example, in the original architecture, the “MOVX A, @DPTR” instruction and the “MOV direct, direct”
instruction used two machine cycles or 24 oscillator cycles. Therefore, they required the same amount of
time. In the DS80C320/DS80C323, the MOVX instruction can be done in two machine cycles or eight
oscillator cycles, but the “MOV direct, direct” uses three machine cycles or 12 oscillator cycles. While
both are faster than their original counterparts, they now have different execution times from each other.
This is because in most cases, the DS80C320/DS80C323 use one cycle for each byte. The user concerned
with precise program timing should examine the timing of each instruction for familiarity with the
changes. Note that a machine cycle now requires just four clocks, and provides one ALE pulse per cycle.
Many instructions require only one cycle, but some require five. In the original architecture, all were one
or two cycles except for MUL and DIV.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| DS80C320-QNR | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:High-Speed Microcontroller User Guide |
| DS80C320-WCD | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:High-Speed Microcontroller User Guide |
| DS80C320-WCG | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:High-Speed Microcontroller User Guide |
| DS80C320-WCL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:High-Speed Microcontroller User Guide |
| DS80C320-WCR | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:High-Speed Microcontroller User Guide |
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