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參數(shù)資料
| 型號： | DS80C390-FNR |
| 元件分類： | 微處理器 |
| 英文描述： | Dual CAN High-Speed Microprocessor |
| 中文描述： | 雙CAN高速微處理器 |
| 文件頁數(shù)： | 10/58頁 |
| 文件大?。?/td> | 5486K |
| 代理商： | DS80C390-FNR |
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DS80C390
E8h
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EEh
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F0h
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10 of 58
110199
EIE
MXAX
C1M1C
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C1M5C
B
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EIP
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C1M15C
*Shaded bits are Timed Access protected.
CANBIE
C0IE
C1IE
EWDI
EX5
EX4
EX3
EX2
MSRDY
MSRDY
MSRDY
MSRDY
MSRDY
ETI
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ERI
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ERI
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INTRQ
INTRQ
INTRQ
INTRQ
INTRQ
EXTRQ
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EXTRQ
MTRQ
MTRQ
MTRQ
MTRQ
MTRQ
ROW/TIH
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DTUP
DTUP
DTUP
DTUP
DTUP
MSRDY
MSRDY
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CANBIP
MSRDY
MSRDY
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ETI
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C0IP
ETI
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C1IP
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INTRQ
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PWDI
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PX5
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MTRQ
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ROW/TIH
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PX3
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DTUP
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ON-CHIP ARITHMETIC ACCELERATOR
An on-chip math accelerator allows the microcontroller to perform 32- and 16-bit multiplication, division,
shifting, and normalization using dedicated hardware. Math operations are performed by sequentially
loading three special registers. The mathematical operation is determined by the sequence in which three
dedicated SFRs (MA, MB and MC) are accessed, eliminating the need for a special step to choose the
operation. The normalize function facilitates the conversion of 4-byte unsigned binary integers into
floating point format. The following table shows the operations supported by the math accelerator and
their time of execution.
ARITHMETIC ACCELERATOR EXECUTION TIMES
Table 3
Operation
Result
32-bit/16-bit divide
32-bit quotient, 16-bit remainder
16-bit/16-bit divide
16-bit quotient, 16-bit remainder
16-bit/16-bit multiply
32-bit product
32-bit shift left/right
32-bit result
32-bit normalize
32-bit mantissa, 5 bit exponent
Execution Time
36 t
CLCL
24 t
CLCL
24 t
CLCL
36 t
CLCL
36 t
CLCL
The following table demonstrates the procedure to perform mathematical operations using the hardware
math accelerator. The MA and MB registers must be loaded and read in the order shown for proper
operation, although accesses to any other registers can be performed between access to the MA or MB
registers. An access to the MA, MB, or MC registers out of sequence will corrupt the operation, requiring
the software to clear the MST bit to restart the math accelerator state machine. Consult the description of
the MCNT0 SFR for details of how the shift and normalize functions operate.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS80C390-FNR+ | 功能描述:8位微控制器 -MCU Dual CAN High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| DS80C390-QCR | 功能描述:8位微控制器 -MCU Dual CAN High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| DS80C390-QCR+ | 功能描述:8位微控制器 -MCU Dual CAN High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| DS80C390-QNR | 功能描述:8位微控制器 -MCU Dual CAN High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| DS80C390-QNR+ | 功能描述:8位微控制器 -MCU Dual CAN High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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