- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄3787 > DS87C520-ECL (Maxim Integrated Products)IC MCU EPROM/ROM 33MHZ HS 44TQFP PDF資料下載
參數(shù)資料
| 型號： | DS87C520-ECL |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/43頁 |
| 文件大小： | 0K |
| 描述： | IC MCU EPROM/ROM 33MHZ HS 44TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS |
| 產(chǎn)品變化通告： | Product Discontinuation 20/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SIO，UART/USART |
| 外圍設(shè)備： | 電源故障復(fù)位，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 16KB（16K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 44-TQFP |
| 包裝： | 托盤 |
| 其它名稱： | DS87C520ECL |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
12 of 43
When disabled, the 1kB memory area is transparent to the system memory map. Any MOVX directed to
the space between 0000h and FFFFh goes to the expanded bus on Ports 0 and 2. This also is the default
condition. This default allows the DS87C520/DS83C520 to drop into an existing system that uses these
addresses for other hardware and still have full compatibility.
The on-chip data area is software selectable using 2 bits in the Power Management Register at location
C4h. This selection is dynamically programmable. Thus access to the on-chip area becomes transparent to
reach off-chip devices at the same addresses. The control bits are DME1 (PMR.1) and DME0 (PMR.0).
They have the following operation:
Table 2. Data Memory Access Control
DME1
DME0
DATA MEMORY ADDRESS
MEMORY FUNCTION
0
0000h–FFFFh
External data memory (default condition)
0000h–03FFh
Internal SRAM data memory
0
1
0400h–FFFFh
External data memory
1
0
Reserved
0000h–03FFh
Internal SRAM data memory
0400h–FFFBh
Reserved—no external access
FFFCh
Read access to the status of lock bits
1
FFFDh–FFFFh
Reserved—no external access
Notes on the status byte read at FFFCh with DME1, 0 = 1, 1: Bits 2–0 reflect the programmed status of
the security lock bits LB2–LB0. They are individually set to a logic 1 to correspond to a security lock bit
that has been programmed. These status bits allow software to verify that the part has been locked before
running if desired. The bits are read only.
Note: After internal MOVX SRAM has been initialized, changing the DME0/1 bits has no effect on the
contents of the SRAM.
STRETCH MEMORY CYCLE
The DS87C520/DS83C520 allow software to adjust the speed of off-chip data memory access. The
microcontrollers can perform the MOVX in as few as two instruction cycles. The on-chip SRAM uses
this speed and any MOVX instruction directed internally uses two cycles. However, the time can be
stretched for interface to external devices. This allows access to both fast memory and slow memory or
peripherals with no glue logic. Even in high-speed systems, it may not be necessary or desirable to
perform off-chip data memory access at full speed. In addition, there are a variety of memory-mapped
peripherals such as LCDs or UARTs that are slow.
The Stretch MOVX is controlled by the Clock Control Register at SFR location 8Eh as described below.
It allows the user to select a Stretch value between 0 and 7. A Stretch of 0 will result in a two-machine
cycle MOVX. A Stretch of 7 will result in a MOVX of nine machine cycles. Software can dynamically
change this value depending on the particular memory or peripheral.
On reset, the Stretch value will default to a 1, resulting in a three-cycle MOVX for any external access.
Therefore, off-chip RAM access is not at full speed. This is a convenience to existing designs that may
not have fast RAM in place. Internal SRAM access is always at full speed regardless of the Stretch
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 1061541005 | ADPT OPT SC/APC-SC/APC GREEN |
| 1061541000 | ADPT EMI-SHLD SIMPLEX SC-SC BLUE |
| 1061541531 | ADPT OPT MULTIMODE LC-LC BEIGE |
| MC9S12XS64CAER | IC MCU 16BIT 128K FLASH 64LQFP |
| MCIMX536AVV8B | MULTIMEDIA PROC 529-TEPBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS87C520-ECL+ | 功能描述:8位微控制器 -MCU EPROM/ROM High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| DS87C520-ENL | 功能描述:8位微控制器 -MCU EPROM/ROM High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| DS87C520-ENL+ | 功能描述:8位微控制器 -MCU EPROM/ROM High-Speed RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| DS87C520-FCL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| DS87C520MCL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM/ROM High-Speed Microcontrollers |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。