參數(shù)資料
型號(hào)： DS87C530-QNL
廠商： Maxim Integrated Products
文件頁數(shù)： 6/45頁
文件大小： 0K
描述： IC MCU EPR/ROM W/RTC 33MZ 52PLCC
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 23
系列： 87C
核心處理器： 8051
芯體尺寸： 8-位
速度： 33MHz
連通性： EBI/EMI，SIO，UART/USART
外圍設(shè)備： 電源故障復(fù)位，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 16KB（16K x 8）
程序存儲(chǔ)器類型： OTP
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 52-LCC（J 形引線）
包裝： 管件
其它名稱： DS87C530QNL
DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock
14 of 45
device will immediately jump to external program execution because program code from 4kB to 16kB
(1000h–3FFFh) is no longer located on-chip. This could result in code misalignment and execution of an
invalid instruction. The recommended method is to modify the ROMSIZE register from a location in
memory that will be internal (or external) both before and after the operation. In the above example, the
instruction which modifies the ROMSIZE register should be located below the 4kB (1000h) boundary, so
that it will be unaffected by the memory modification. The same precaution should be applied if the
internal program memory size is modified while executing from external program memory.
Off-chip memory is accessed using the multiplexed address/data bus on P0 and the MSB address on P2.
While serving as a memory bus, these pins are not I/O ports. This convention follows the standard 8051
method of expanding on-chip memory. Off-chip ROM access also occurs if the EA pin is a logic 0. EA
overrides all bit settings. The PSEN signal will go active (low) to serve as a chip enable or output enable
when Ports 0 and 2 fetch from external ROM.
Figure 4. ROM Memory Map
DATA MEMORY ACCESS
Unlike many 8051 derivatives, the DS87C530/DS83C530 contain on-chip data memory. The devices also
contain the standard 256 bytes of RAM accessed by direct instructions. These areas are separate. The
MOVX instruction accesses the on-chip data memory. Although physically on-chip, software treats this
area as though it was located off-chip. The 1kB of SRAM is between address 0000h and 03FFh.
Access to the on-chip data RAM is optional under software control. When enabled by software, the data
SRAM is between 0000h and 03FFh. Any MOVX instruction that uses this area will go to the on-chip
RAM while enabled. MOVX addresses greater than 03FFh automatically go to external memory through
Ports 0 and 2.
When disabled, the 1kB memory area is transparent to the system memory map. Any MOVX directed to
the space between 0000h and FFFFh goes to the expanded bus on Ports 0 and 2. This also is the default
condition. This default allows the DS87C530/DS83C530 to drop into an existing system that uses these
addresses for other hardware and still have full compatibility.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS87C530-QNL+ 功能描述:8位微控制器 -MCU EPROM MCU w/RTC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
DS87C530Z+ECL 制造商:Maxim Integrated Products 功能描述:MICRO OTP RTC 33MHZ 52P TQFP PB-FRR - Trays
DS87C550 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM
DS87C550-FCL 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM
DS87C550-FNL 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM
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