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參數(shù)資料
| 型號： | DS87C550 |
| 英文描述： | EPROM High-Speed Micro with A/D and PWM |
| 中文描述： | 存儲器高速微與A / D及PWM |
| 文件頁數(shù)： | 11/50頁 |
| 文件大?。?/td> | 763K |
| 代理商： | DS87C550 |
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DS87C550
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For example, do not select a maximum ROM address of 8k from an external ROM address of 7k (if
ROMSIZE is set for 4k or less).
Off-chip memory is accessed using the multiplexed address/data bus on P0 and the MSB address on P2.
While serving as a memory bus, these pins are not available as I/O ports. This convention follows the
standard 8051 method of expanding on-chip memory. Off-chip ROM access also occurs if the EA pin is
logic 0. EA overrides all bit settings. The PSEN signal will go active (low) to serve as a chip enable or
output enable when Ports 0 & 2 fetch from external ROM.
ROM MEMORY MAP
Figure 2
DATA MEMORY
Unlike many 8051 derivatives, the DS87C550 contains additional on-chip data memory. In addition to
the standard 256 bytes of data RAM accessed by direct instructions, the DS87C550 contains another 1
kbyte of data memory that is accessed using the MOVX instruction. Although physically on-chip,
software treats this area as though it was located off-chip. The 1 kbyte of SRAM is permanently located
from address 0000h to 03FFh (when enabled).
Access to the on-chip data RAM is optional under software control. When enabled by software, the data
SRAM is between 0000h and 03FFh. Any MOVX instruction that uses this area will go to the on-chip
RAM while enabled. MOVX addresses greater than 1k automatically go to external memory through
Ports 0 & 2.
When disabled, the 1k memory area is transparent to the system memory map. Any MOVX directed to
the space between 0000h and FFFFh goes to the expanded bus on Ports 0 & 2. This also is the default
condition. This default allows the DS87C550 to drop into an existing system that uses these addresses for
other hardware and still have full compatibility.
The on-chip data area is software selectable using two bits in the Power Management Register (DME1,
DME0). This selection is dynamically programmable. Thus access to the on-chip area becomes
transparent to reach off-chip devices at the same addresses. These bits have the following operation:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS87C550-QCL | EPROM High-Speed Micro with A/D and PWM |
| DS87C550-FCL | EPROM High-Speed Micro with A/D and PWM |
| DS87C550-FNL | EPROM High-Speed Micro with A/D and PWM |
| DS87C550-KCL | EPROM High-Speed Micro with A/D and PWM |
| DS87C550-QNL | EPROM High-Speed Micro with A/D and PWM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS87C550-FCL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM |
| DS87C550-FNL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM |
| DS87C550-KCL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM |
| DS87C550-QCL | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:EPROM High-Speed Micro with A/D and PWM |
| DS87C550-QCL+ | 功能描述:IC MCU EPROM ADC/PWM HS 68-PLCC RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:87C 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設(shè)備:LED，POR，WDT 輸入/輸出數(shù):9 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件 |
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