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參數(shù)資料
| 型號： | DS90CF363BMT/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPD-LINK TX 18BIT 48-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 38 |
| 類型： | 發(fā)射器 |
| 驅(qū)動器/接收器數(shù)： | 21/3 |
| 規(guī)程： | FPD 鏈路，LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-TSSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1280 (CN2011-ZH PDF) |
| 其它名稱： | DS90CF363BMT |
SNLS180D – JULY 2004 – REVISED APRIL 2013
DS90CF363B PIN DESCRIPTIONS — FPD LINK TRANSMITTER
Pin Name
I/O
No.
Description
TxIN
I
21
TTL level input. This includes: 6 Red, 6 Green, 6 Blue, and 3 control lines—FPLINE, FPFRAME and
DRDY (also referred to as HSYNC, VSYNC, Data Enable).
TxOUT+
O
3
Positive LVDS differential data output.
TxOUT
O
3
Negative LVDS differential data output.
FPSHIFT IN
I
1
TTL Ievel clock input. The falling edge acts as data strobe. Pin name TxCLK IN.
TxCLK OUT+
O
1
Positive LVDS differential clock output.
TxCLK OUT
O
1
Negative LVDS differential clock output.
PWR DOWN
I
1
TTL level input. Assertion (low input) TRI-STATES the outputs, ensuring low current at power down.
See Applications Information .
VCC
I
4
Power supply pins for TTL inputs.
GND
I
4
Ground pins for TTL inputs.
PLL VCC
I
1
Power supply pin for PLL.
PLL GND
I
2
Ground pins for PLL.
LVDS VCC
I
1
Power supply pin for LVDS outputs.
LVDS GND
I
3
Ground pins for LVDS outputs.
NC
1
No connect
APPLICATIONS INFORMATION
The DS90CF363B are backward compatible with the DS90C363/DS90CF363A and are a pin-for-pin
replacement.
This device may also be used as a replacement for the DS90CF563 (5V, 65MHz) and DS90CF561 (5V, 40MHz)
FPD-Link Transmitters with certain considerations/modifications:
1. Change 5V power supply to 3.3V. Provide this supply to the VCC, LVDS VCC and PLL VCC of the transmitter.
TRANSMITTER INPUT PINS
The DS90CF363B transmitter input and control inputs accept 3.3V LVTTL/LVCMOS levels. They are not 5V
tolerant.
TRANSMITTER INPUT CLOCK/DATA SEQUENCING
The DS90CF363B does not require any special requirement for sequencing of the input clock/data and PD
(PowerDown) signal. The DS90CF363B offers a more robust input sequencing feature where the input clock/data
can be inserted after the release of the PD signal. In the case where the clock/data is stopped and reapplied,
such as changing video mode within Graphics Controller, it is not necessary to cycle the PD signal. However,
there are in certain cases where the PD may need to be asserted during these mode changes. In cases where
the source (Graphics Source) may be supplying an unstable clock or spurious noisy clock output to the LVDS
transmitter, the LVDS Transmitter may attempt to lock onto this unstable clock signal but is unable to do so due
the instability or quality of the clock source. The PD signal in these cases should then be asserted once a stable
clock is applied to the LVDS transmitter. Asserting the PWR DOWN pin will effectively place the device in reset
and disable the PLL, enabling the LVDS Transmitter into a power saving standby mode. However, it is still
generally a good practice to assert the PWR DOWN pin or reset the LVDS transmitter whenever the clock/data is
stopped and reapplied but it is not mandatory for the DS90CF363B.
SPREAD SPECTRUM CLOCK SUPPORT
The DS90CF363B can support Spread Spectrum Clocking signal type inputs. The DS90CF363B outputs will
accurately track Spread Spectrum Clock/Data inputs with modulation frequencies of up to 100KHz (max.)with
either center spread of ±2.5% or down spread -5% deviations.
POWER SOURCES SEQUENCE
In typical applications, it is recommended to have VCC, LVDS VCC and PLL VCC from the same power source with
three separate de-coupling bypass capacitor groups. There is no requirement on which VCC entering the device
first.
8
Copyright 2004–2013, Texas Instruments Incorporated
Product Folder Links: DS90CF363B
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS90CF363BMTX | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| DS90CF363BMTX/NOPB | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| DS90CF363MTD | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz |
| DS90CF363MTDX | 功能描述:IC TX PROG LVDS 3.3V 48-TSSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| DS90CF364 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) LinkΑ65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz |
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