- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1917 > DS90CF363BMTX/NOPB (National Semiconductor)IC FPD-LINK 18BIT TX 48-TSSOP PDF資料下載
參數(shù)資料
| 型號： | DS90CF363BMTX/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPD-LINK 18BIT TX 48-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 發(fā)射器 |
| 驅(qū)動器/接收器數(shù)： | 21/3 |
| 規(guī)程： | FPD 鏈路，LVDS |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-TSSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | DS90CF363BMTX |
SNLS180D – JULY 2004 – REVISED APRIL 2013
Transmitter Switching Characteristics (continued)
Over recommended operating supply and temperature ranges unless otherwise specified
Symbol
Parameter
Min
Typ
Max
Units
TPPos0
Transmitter Output Pulse Position for Bit 0 (Figure 12 )(1)
f = 40
0.25
0
+0.25
ns
MHz
TPPos1
Transmitter Output Pulse Position for Bit 1
3.32
3.57
3.82
ns
TPPos2
Transmitter Output Pulse Position for Bit 2
6.89
7.14
7.39
ns
TPPos3
Transmitter Output Pulse Position for Bit 3
10.46
10.71
10.96
ns
TPPos4
Transmitter Output Pulse Position for Bit 4
14.04
14.29
14.54
ns
TPPos5
Transmitter Output Pulse Position for Bit 5
17.61
17.86
18.11
ns
TPPos6
Transmitter Output Pulse Position for Bit 6
21.18
21.43
21.68
ns
TPPos0
Transmitter Output Pulse Position for Bit 0 (Figure 12 )(1)
f =
0.45
0
+0.45
ns
25MHz
TPPos1
Transmitter Output Pulse Position for Bit 1
5.26
5.71
6.16
ns
TPPos2
Transmitter Output Pulse Position for Bit 2
10.98
11.43
11.88
ns
TPPos3
Transmitter Output Pulse Position for Bit 3
16.69
17.14
17.59
ns
TPPos4
Transmitter Output Pulse Position for Bit 4
22.41
22.86
23.31
ns
TPPos5
Transmitter Output Pulse Position for Bit 5
28.12
28.57
29.02
ns
TPPos6
Transmitter Output Pulse Position for Bit 6
33.84
34.29
34.74
ns
TSTC
TxIN Setup to TxCLK IN (Figure 7 )
2.5
ns
THTC
TxIN Hold to TxCLK IN (Figure 7 )
0.5
ns
TCCD
TxCLK IN to TxCLK OUT Delay (Figure 8 ) 50% duty cycle input clock is assumed, T
3.011
6.082
ns
A= 10°C, and 65MHz for " Min ", T A = 70°C, and 25MHz for " Max ", VCC = 3.6V
SSCG
Spread Spectrum Clock support; Modulation frequency with a linear
f = 25
100KHz ±
profile (2)
MHz
2.5%/
5%
f = 40
100KHz ±
MHz
2.5%/
5%
f = 65
100KHz ±
MHz
2.5%/
5%
TPLLS
Transmitter Phase Lock Loop Set (Figure 9 )
10
ms
TPDD
Transmitter Power Down Delay (Figure 11 )
100
ns
(2)
Care must be taken to ensure TSTC and THTC are met so input data are sampling correctly. This SSCG parameter only shows the
performance of tracking Spread Spectrum Clock applied to TxCLK IN pin, and reflects the result on TxCLKOUT+ and TxCLK
pins.
AC Timing Diagrams
Figure 2. “Worst Case” Test Pattern
4
Copyright 2004–2013, Texas Instruments Incorporated
Product Folder Links: DS90CF363B
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DS90CR218AMTDX/NOPB | IC RCVR 21BIT CHAN LINK 48TSSOP |
| DS90LV031ATMTCX/NOPB | IC LINE DRIVER QUAD CMOS 16TSSOP |
| DS90LV804TSQX/NOPB | IC BUFFER/REPEATR LVDS 4CH 32LLP |
| DS9100-C+ | CONTACT TOUCH AND HOLD |
| DSP56301AG80B1 | IC DSP 24BIT 80MHZ GP 208-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS90CF363MTD | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz |
| DS90CF363MTDX | 功能描述:IC TX PROG LVDS 3.3V 48-TSSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| DS90CF364 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) LinkΑ65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz |
| DS90CF364A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| DS90CF364A_07 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link-65MHz |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。