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參數(shù)資料
| 型號： | DSC-11524-243S |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 位置變換器 |
| 英文描述： | DIGITAL TO SYNCHRO OR RESOLVER, DIP36 |
| 封裝： | DDIP-36 |
| 文件頁數(shù)： | 11/13頁 |
| 文件大?。?/td> | 529K |
| 代理商： | DSC-11524-243S |
7
Data Device Corporation
www.ddc-web.com
DSC-11524
L-7/08-0
OUTPUT CONFIGURATION
The output amplifier section can be configured for Synchro and
Resolver outputs, as shown in FIGURE 3.
OUTPUT PHASING AND OUTPUT SCALE FACTOR
The analog output signals have the following phasing:
Synchro output:
S3—S1 = (RH - RL)A
o(1 + A(θ)) sin θ
S2—S3 = (RH - RL)A
o(1 + A(θ)) sin( θ + 120°)
S1—S2 = (RH - RL)A
o(1 + A(θ)) sin( θ + 240°)
Resolver output:
S3—S1 = (RH - RL)A
o(1 + A(θ)) sin θ
S2—S4 = (RH - RL)A
o(1 + A(θ)) cos θ
The output amplifiers simultaneously track reference voltage
fluctuations because they are proportional to (RH - RL). The
transformation ratio A
o is 11.8/26 for 11.8 V rms L-L output. The
maximum variation in A
o from all causes is ± 0.5%. The term A(θ)
represents the variation of the amplitude with the digital signal
input angle. A(θ), which is called the scale factor variation, is a
smooth function of (θ) without discontinuities and is less than
±0.1% for all values of (θ). The total maximum variation in A
o(1
+ A(θ)) is therefore ± 0.6%.
Because the amplitude factor (RH - RL)A
o(1 + A(θ)) varies simul-
taneously on all output lines, it will not be a source of error when
the DSC-11524 is to drive a ratiometric system such as a syn-
chro or resolver. However, if the outputs are used independently,
as in x-y plotters, the amplitude variations must be taken into
account.
OUTPUT TRANSFORMER
The DSC-11524 uses the 51538 step-up transformer to drive 90
Vl-l synchro loads. The 51538 transformer specifications are
shown in TABLE 3 and the schematic and mechanical outline
drawings are shown in FIGURE 4.
FIGURE 3. OUtpUt pIn pROGRAMMInG
34
S3’ 35
S3
S3 (SIN)
32
S1
S1 (SIN)
DSC-11524
36
S2
S2 (COS)
31
S4
S4 (COS)
33
S2’
11.8 V RESOLVER OUtpUt
32
35
S1
S3
+SIN
36
S2
33
36
DSC-11524 S2’
DSC-11524 S2
+COS
35
S3
34
33
S3’
S2’
RTN
* 11.8 V SYnChRO OUtpUt
6.81 V RESOLVER OUtpUt
*For S2(z) grounded applications use Beta transformer P/N 42929, Synchro-to-Synchro, 11.8v to 11.8v 400 Hz.
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| DSC-11524-243Z | DIGITAL TO SYNCHRO OR RESOLVER, DIP36 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSC-11524-302 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital-to-Resolver/Synchro Converter |
| DSC-11524-303 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital-to-Resolver/Synchro Converter |
| DSC-11524-304 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital-to-Resolver/Synchro Converter |
| DSC-11524-305 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital-to-Resolver/Synchro Converter |
| DSC1206-100KJI | 制造商:TT Electronics / Welwyn 功能描述:RESISTOR DOUBLE SIDED 100K 1206 CASE |
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