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參數(shù)資料
| 型號(hào)： | DSP101JP |
| 英文描述： | DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS |
| 中文描述： | DSP兼容采樣單/雙模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 8/22頁 |
| 文件大小： | 252K |
| 代理商： | DSP101JP |
DSP101/102
8
THEORY OF OPERATION
The DSP101 and DSP102 are sampling analog-to-digital
converters optimized for handling dynamic signals. They
have complete logic interface circuitry for ease of use with
standard digital signal processing ICs, and transmit data
words in a serial stream. The successive approximation
conversion architecture is combined with an inherently sam-
pling switched capacitor array to provide maximum user
flexibility over sampling and conversion timing.
The DSP101 and DSP102 are pipelined internally. When the
user gives a convert command at time (t), two actions are
initiated. First, the internal sample/holds are switched to the
hold state, and a conversion cycle is initiated. At the same
time, the DSP101 or DSP102 transmits a synchronization
pulse and starts shifting out the conversion results from the
previous convert command at (t-1) using the system bit
clock. The data from the conversion at time (t) is shifted out
of the converter after the next convert command is received.
Both the DSP101 and the DSP102 are 18-bit A/Ds inter-
nally. When the DSP IC is programmed to accept 16-bit
word lengths, the processor will ignore the last two data bits
transmitted from the DSP101 or DSP102. A Cascade Mode
on the DSP102 can be invoked to transmit data for both
conversion channels over a single serial line as a 32-bit
word. In this mode, the first 16 bits of data transmitted after
the Sync pulse contain data from channel A, followed by 16
bits of information from channel B, allowing a single 32-bit
word to contain data for both channels.
A unique Tag feature allows additional digital data to be
appended to the conversion results, so that a single data
word contains conversion results plus other signal informa-
tion, such as gain settings or multiplexer channel settings in
front of the converter.
The DSP101 and DSP102 are high-resolution A/D convert-
ers complete with sampling capability and on-board refer-
ences. They can acquire and convert analog signals at up to
a 200kHz sampling rate. Both operate from
±
5V supplies,
and have full-scale analog input ranges of
±
2.75V.
BASIC OPERATION
Figure 2 shows the minimum connections required to oper-
ate the DSP101. The falling edge of a convert command on
pin 21 puts the internal sampling capacitor array into the
hold state. The falling edge on pin 21 also starts the process
to initiate a conversion and transmit data from the previous
conversion, synchronizing both appropriately to the 10MHz
clock input on pin 13. Figure 1 shows the timing relationship
between the convert command, the output data, and the
synchronization pulse.
In this basic system, the 10MHz clock is used both to
generate a 3.33MHz conversion clock and as the data trans-
fer bit clock for outputting data. Per Figure 1, there must be
at least 72 clock pulses on pin 13 between convert com-
mands, so that this circuit can sample and convert at up to
138kHz.
FIGURE 2. DSP101 Basic Operation.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
10μF
10μF
0.1μF
AGND
REF
CAP
NC
NC
NC
DGND
CONV
SOUT
NC
TAG
NC
XCLK
SYNC
DSP101
+
+
10μF
–5V
+5V
NOTES: (1) Leave Unconnected.
(2) Protection from power supply momentary overrange.
VPOT
VIN
MSB
VOS
VA–
VA+
DGND
DGND
VD
CLKIN
CLKOUT
SSF
OSC1
OSC2
(1)
(1)
(1)
(1)
(1)
= Analog Ground
= Digital Ground
Convert Command
Serial Data Output
Synch
Pulse
Bit Clock
10μF
+
+5V
10MHz, 50%
(±10%) 74HC
Logic Level Clock Input
±2.75 Analog Input
10μF
+
–5V
+
(1)
(1)
(1)
10
(
2)
相關(guān)PDF資料 |
PDF描述 |
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| DSP101KP | DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS |
| DSP102JP | DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS |
| DSP102KP | TVS 400W 6.0V UNIDIRECT SMA |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP101KP | 制造商:BB 制造商全稱:BB 功能描述:DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS |
| DSP102 | 制造商:BB 制造商全稱:BB 功能描述:DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS |
| DSP1024 | 制造商:TDK-Lambda Corporation 功能描述:AC/DC Power Supply Single-OUT 24V 0.42A 10.1W 制造商:TDK-Lambda Corporation 功能描述:AC/DC PS SGL-OUT 24V 0.42A 10.1W - Bulk 制造商:TDK 功能描述:PWR SUP DIN RAIL 24V 10.1W .42A 制造商:TDK-Lambda 功能描述:AC/DC Power Supply Single-OUT 24V 0.42A 10.1W |
| DSP10-24 | 功能描述:DIN導(dǎo)軌式電源 10W 24V 0.42A DIN Rail 115-230VAC RoHS:否 制造商:Mean Well 產(chǎn)品:Linear Supplies 商用/醫(yī)用:Commercial 輸出功率額定值:960 W 輸入電壓:180 VAC to 264 VAC, 254 VDC to 370 VDC 輸出端數(shù)量:1 輸出電壓（通道 1）:48 V 輸出電流（通道 1）: 輸出電壓（通道 2）: 輸出電流（通道 2）: 輸出電壓（通道 3）: 輸出電流（通道 3）: 尺寸:150 mm L x 110 mm W |
| DSP10-24 | 制造商:TDK-Lambda Corporation 功能描述:Switch Mode Power Supply |
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