參數(shù)資料
型號(hào)： DSP56858FVE
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： 16-bit Digital Signal Controllers
中文描述： 16位數(shù)字信號(hào)控制器
文件頁(yè)數(shù)： 19/64頁(yè)
文件大?。?/td> 956K
代理商： DSP56858FVE
Introduction
56858 Technical Data, Rev. 6
Freescale Semiconductor
19
STD1
GPIOD0
E8
99
Output
Input/Output
ESSI Transmit Data (STD1)
—This output pin transmits serial data
from the ESSI Transmitter Shift Register.
Port D GPIO (0)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SRD1
GPIOD1
E11
100
Input
Input
/
Output
ESSI Receive Data (SRD1)
—This input pin receives serial data and
transfers the data to the ESSI Receive Shift Register.
Port D GPIO (1)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SCK1
GPIOD2
E9
101
Input
/Output
Input/Output
ESSI Serial Clock (SCK1)
—This bidirectional pin provides the serial
bit rate clock for the transmit section of the ESSI. The clock signal can
be continuous or gated and can be used by both the transmitter and
receiver in synchronous mode.
Port D GPIO (2)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC10
GPIOD3
D10
102
Input
/Output
Input/Output
ESSI Serial Control Pin 0 (SC10)
—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin will be used for the receive
clock I/O. For synchronous mode, this pin is used either for
transmitter1 output or for serial I/O flag 0.
Port D GPIO (3)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC11
GPIOD4
D11
103
Input
/Output
Input/Output
ESSI Serial Control Pin 1 (SC11)
—The function of this pin is
determined by the selection of either synchronous or asynchronous
mode. For asynchronous mode, this pin is the receiver frame sync I/O.
For synchronous mode, this pin is used either for transmitter2 output
or for serial I/O flag 1.
Port D GPIO (4)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
SC12
GPIOC5
C11
104
Input
/Output
Input/Output
ESSI Serial Control Pin 2 (SC12)
—This pin is used for frame sync
I/O. SC02 is the frame sync for both the transmitter and receiver in
synchronous mode and for the transmitter only in asynchronous mode.
When configured as an output, this pin is the internally generated
frame sync signal. When configured as an input, this pin receives an
external frame sync signal for the transmitter (and the receiver in
synchronous operation).
Port D GPIO (5)
—This pin is a General Purpose I/O (GPIO) pin when
the ESSI is not in use.
Table 3-1 56858 Signal and Package Information for the 144-pin LQFP and MAPBGA
Signal
Name
BGA
Pin No.
LQFP
Pin No.
Type
Description
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