
Motorola DSP Assembler
Assembler Processing
MOTOROLA
DSP ASSEMBLER REFERENCE MANUAL
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1-9
1.6
ASSEMBLER PROCESSING
The Motorola DSP Assembler is a two-pass Assembler. During the first pass the source
program is read to build the symbol and macro tables. During the second pass the object
file is generated (assembled) with reference to the tables created during pass one. It is
also during the second pass that the source program listing is produced.
Each source statement is processed completely before the next source statement is read.
As each line is read in, any translations specified by the
DEFINE
directive are applied.
Each statement is then processed, and the Assembler examines the label, operation
code, operand, and data transfer fields. The macro definition table is scanned for a match
with the operation code. If there is no match, the operation code and directive tables are
scanned for a match with a known opcode.
Any errors detected by the Assembler are displayed before the actual line containing the
error is printed. Errors and warnings are accumulated, and a total number of errors and
warnings is printed at the end of the source listing. If no source listing is produced, error
messages are still displayed to indicate that the assembly process did not proceed nor-
mally. The number of errors is returned as an exit status when the Assembler returns con-
trol to the host operating system.
1.7
DEFINITION OF TERMS
Since the Motorola DSP architectures are different from normal microprocessors, the pro-
grammer may not be familiar with some of the terms used in this document. The following
discussion serves to clarify some of the concepts discussed later in this manual.
The Motorola DSP architecture can have as many as five separate memory spaces re-
ferred to as the
X
,
Y
,
L
,
P
(
P
rogram), and
E
(EMI - Extended Memory Interface) memory
spaces.
L
memory space is a concatenation of
X
and
Y
data memory and is considered
by the Assembler as a superset of the
X
and
Y
memory spaces.
E
memory is specific to
the DSP56004 processor, and provides for different data representations for various
memory hardware configurations. The Assembler will generate object code for each
memory space, but object code can only be generated for one memory space at a time.
The memory space and address location into which the object code generated by the As-
sembler will be loaded are referred to as the
load memory space
and
load address
, re-
spectively. Because the DSP architecture allows data transfers between memory spaces,
sometimes object code is loaded into an address of one memory space but will later be
transferred to a different memory space and address before the program is run. One ex-
ample of this might be a program located in an external EPROM that will be transferred
into external program RAM before it is run. The transfer of code/data from one memory
space/address to a different memory space/address is called an
overlay
.
When the object code for a part of the program is generated that later will be used as an
overlay, the load memory space and load address do not correspond to the memory
space and address where the program will be run. The memory space and address loca-
tion where the code/data will be located when the program is run are referred to as the
F
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n
.