參數資料
型號: DSPB56374AF
廠商: Freescale Semiconductor
文件頁數: 62/64頁
文件大?。?/td> 0K
描述: IC DSP 24BIT 150MHZ 80-LQFP
產品變化通告: Product Discontinuation 24/Feb/2012
標準包裝: 90
系列: DSP56K/Symphony
類型: 音頻處理器
接口: 主機接口,I²C,SAI,SPI
時鐘速率: 150MHz
非易失內存: ROM(84 kB)
芯片上RAM: 54kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.25V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應商設備封裝: 80-LQFP(14x14)
包裝: 托盤
Signal Groupings
DSP56374 Data Sheet, Rev. 4.2
Freescale Semiconductor
7
4.3
SCAN
4.4
Clock and PLL
PLLP_GND(1)
PLL Ground—The PLL ground should be provided with an extremely low-impedance path to
ground. This connection must be tied externally to all other chip ground connections. The user
must provide adequate external decoupling capacitors between PLLP_VDD and PLLP_GND.
PLLD_GND(1)
PLL Ground—The PLL ground should be provided with an extremely low-impedance path to
ground. This connection must be tied externally to all other chip ground connections. The user
must provide adequate external decoupling capacitors between PLLD_VDD and PLLD_GND.
CORE_GND(4)
Core Ground—The Core ground should be provided with an extremely low-impedance path to
ground. This connection must be tied externally to all other chip ground connections. The user
must provide adequate external decoupling capacitors.
IO_GND(2)
SHI, ESAI, ESAI_1, WDT and Timer I/O Ground—IO_GND is the ground for the SHI, ESAI,
ESAI_1, WDT and Timer I/O. This connection must be tied externally to all other chip ground
connections. The user must provide adequate external decoupling capacitors.
Table 6. SCAN Signals
Signal
Name
Type
State
During
Reset
Signal Description
SCAN
Input
SCAN—Manufacturing test pin. This pin must be connected to ground.
Table 7. Clock and PLL Signals
Signal
Name
Type
State
during
Reset
Signal Description
EXTAL
Input
External Clock / Crystal Input—An external clock source must be connected
to EXTAL in order to supply the clock to the internal clock generator and PLL.
XTAL
Output
Chip Driven Crystal Output—Connects the internal Crystal Oscillator output to an external
crystal. If an external clock is used, leave XTAL unconnected.
PINIT/NMI
Input
PLL Initial/Nonmaskable Interrupt—During assertion of RESET, the value of
PINIT/NMI is written into the PLL Enable (PEN) bit of the PLL control register,
determining whether the PLL is enabled or disabled. After RESET
de-assertion and during normal instruction processing, the PINIT/NMI
Schmitt-trigger input is a negative-edge-triggered nonmaskable interrupt
(NMI) request internally synchronized to the internal system clock.
This pin has an internal pull up resistor.
This input is 5 V tolerant.
Table 5. Grounds (continued)
Ground Name
Description
相關PDF資料
PDF描述
VI-B6M-CY-F3 CONVERTER MOD DC/DC 10V 50W
T491D226K035AH CAP TANT 22UF 35V 10% 2917
DAM15S400 CONN DSUB RCPT 15POS T/H GOLD
TRJC225K050RRJ CAP TANT 2.2UF 50V 10% 2312
DSPB56721AG AUDIO PROCESSOR SYMPH 144-LQFP
相關代理商/技術參數
參數描述
DSPB56374AF 制造商:Freescale Semiconductor 功能描述:; Series:DSP56300; DSP Type:Static CMOS
DSPB56374AFC 功能描述:數字信號處理器和控制器 - DSP, DSC 56374 80LQFP AUTOMOTIVE RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
DSPB56720AG 功能描述:數字信號處理器和控制器 - DSP, DSC DSP56720 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
DSPB56720CAG 功能描述:數字信號處理器和控制器 - DSP, DSC 24-BIT 200MHz RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
DSPB56721AF 功能描述:數字信號處理器和控制器 - DSP, DSC DSP56721 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT