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參數(shù)資料
| 型號： | DSPB56724AG |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 46/48頁 |
| 文件大小： | 0K |
| 描述： | DSP 24BIT AUD 250MHZ 144-LQFP |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | DSP56K/Symphony |
| 類型： | 音頻處理器 |
| 接口： | 主機接口，I²C，SAI，SPI |
| 時鐘速率： | 250MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 112kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.20V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-LQFP（20x20） |
| 包裝： | 托盤 |
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Symphony DSP56724/ DSP56725 Multi-Core Audio Processors, Rev. 2
Freescale Semiconductor
7
For correct operation of the internal power-on reset logic, the Core_VDD ramp rate (Tr) to full supply must be less than 10 ms,
as shown in Figure 4.
Figure 5. Ensure Correct Operation of Power-On Reset with Fast Ramp of Core_VDD
1.1.4
Power Consumption Considerations
Power dissipation is a key issue in portable DSP applications. Some of the factors which affect current consumption are
described in this section. Most of the current consumed by CMOS devices is alternating current (ac), which is charging and
discharging the capacitances of the pins and internal nodes.
Current consumption is described by the following formula:
Eqn. 1
where
C=node/pin capacitance
V=voltage swing
f=frequency of node/pin toggle
The maximum internal current (ICCImax) value reflects the typical possible switching of the internal buses on best-case
operation conditions, which is not necessarily a real application case. The typical internal current (ICCItyp) value reflects the
average switching of the internal buses on typical operating conditions.
For applications that require very low current consumption, do the following:
Minimize the number of pins that are switching.
Minimize the capacitive load on the pins.
One way to evaluate power consumption is to use a current per MIPS measurement methodology to minimize specific board
effects (for example, to compensate for measured board current not caused by the DSP). Use the test algorithm, specific test
current measurements, and the following equation to derive the current per MIPS value.
I/MIPS = I/MHz = (ItypF2 - ItypF1)/(F2 - F1)
Eqn. 3
where :
ItypF2=current at F2
ItypF1=current at F1
F2=high frequency (any specified operating frequency)
F1=low frequency (any specified operating frequency lower than F2)
Example 1. Power Consumption Example
For a GPIO address pin loaded with 50 pF capacitance, operating at 3.3 V, and with a 150 MHz clock, toggling at
its maximum possible rate (75 MHz), the current consumption is
Eqn. 2
Core_VDD
Tr must be < 10 ms
0V
1.0 V
Tr
IC
V
×
f
×
=
I50x10 12
–
x
3.3x75x106
12.375mA
==
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSPB56724CAG | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Symphony? DSP56724/DSP56725 Multi-Core Audio Processors |
| DSPB56725AF | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC Multi-Core Audio Processor 80-Pin RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPB56725CAF | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC PB FREE DSPB56724 AP RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| DSPB720DB1E | 功能描述:子卡和OEM板 B VERSION 720 DAUGHTER C RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
| DSPB721DB1E | 功能描述:子卡和OEM板 B VERSION 721 DAUGHTER C RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
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