參數(shù)資料
型號: DSPIC30F3013-20I/ML
廠商: Microchip Technology
文件頁數(shù): 94/161頁
文件大小: 0K
描述: IC DSPIC MCU/DSP 24K 44QFN
產(chǎn)品培訓(xùn)模塊: Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標(biāo)準(zhǔn)包裝: 45
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 20 MIPS
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 24KB(8K x 24)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 管件
配用: DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
其它名稱: DSPIC30F301320IML
2010 Microchip Technology Inc.
DS70139G-page 23
dsPIC30F2011/2012/3012/3013
2.4
DSP Engine
The DSP engine consists of a high-speed 17-bit x
17-bit
multiplier,
a
barrel
shifter
and
a
40-bit
adder/subtracter (with two target accumulators, round
and saturation logic).
The DSP engine also has the capability to perform
inherent
accumulator-to-accumulator
operations,
which require no additional data. These instructions are
ADD, SUB
and NEG.
The dsPIC30F is a single-cycle instruction flow
architecture, therefore, concurrent operation of the
DSP engine with MCU instruction flow is not possible.
However, some MCU ALU and DSP engine resources
may be used concurrently by the same instruction
(e.g., ED, EDAC). See Table 2-2.
The DSP engine has several options selected through
various bits in the CPU Core Configuration register
(CORCON), which are:
1.
Fractional or integer DSP multiply (IF).
2.
Signed or unsigned DSP multiply (US).
3.
Conventional or convergent rounding (RND).
4.
Automatic saturation on/off for ACCA (SATA).
5.
Automatic saturation on/off for ACCB (SATB).
6.
Automatic saturation on/off for writes to data
memory (SATDW).
7.
Accumulator
Saturation
mode
selection
(ACCSAT).
A block diagram of the DSP engine is shown in
TABLE 2-2:
DSP INSTRUCTION
SUMMARY
Instruction
Algebraic
Operation
ACC WB?
CLR
A = 0
Yes
ED
A = (x – y)2
No
EDAC
A = A + (x – y)2
No
MAC
A = A + (x * y)
Yes
MAC
A = A + x2
No
MOVSAC
No change in A
Yes
MPY
A = x y
No
MPY.N
A = – x y
No
MSC
A = A – x y
Yes
Note:
For CORCON layout, see Table 3-3.
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