參數(shù)資料
型號: DSPIC30F4013-30I/P
廠商: Microchip Technology
文件頁數(shù): 70/153頁
文件大小: 0K
描述: IC DSPIC MCU/DSP 48K 40DIP
產(chǎn)品培訓模塊: Serial Communications using dsPIC30F CAN
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
dsPIC30F 12-bit ADC Part 1
標準包裝: 10
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 30 MIP
連通性: CAN,I²C,SPI,UART/USART
外圍設備: AC'97,欠壓檢測/復位,I²S,POR,PWM,WDT
輸入/輸出數(shù): 30
程序存儲器容量: 48KB(16K x 24)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
產(chǎn)品目錄頁面: 651 (CN2011-ZH PDF)
配用: AC30F003-ND - MODULE SOCKET DSPIC30F 40DIP
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
ACICE0206-ND - ADAPTER MPLABICE 40P 600 MIL
其它名稱: DSPIC30F4013-30IP
2010 Microchip Technology Inc.
DS70138G-page 23
dsPIC30F3014/4013
2.4.2.4
Data Space Write Saturation
In addition to adder/subtracter saturation, writes to data
space may also be saturated but without affecting the
contents of the source accumulator. The data space
write
saturation
logic
block
accepts
a
16-bit,
1.15 fractional value from the round logic block as its
input, together with overflow status from the original
source (accumulator) and the 16-bit round adder.
These are combined and used to select the appropriate
1.15 fractional value as output to write to data space
memory.
If the SATDW bit in the CORCON register is set, data
(after rounding or truncation) is tested for overflow and
adjusted accordingly. For input data greater than
0x007FFF, data written to memory is forced to the
maximum positive 1.15 value, 0x7FFF. For input data
less than 0xFF8000, data written to memory is forced
to the maximum negative 1.15 value, 0x8000. The
Most Significant bit (MSb) of the source (bit 39) is used
to determine the sign of the operand being tested.
If the SATDW bit in the CORCON register is not set, the
input data is always passed through unmodified under
all conditions.
2.4.3
BARREL SHIFTER
The barrel shifter is capable of performing up to 16-bit
arithmetic or logic right shifts, or up to 16-bit left shifts
in a single cycle. The source can be either of the two
DSP accumulators, or the X bus (to support multi-bit
shifts of register or memory data).
The shifter requires a signed binary value to determine
both the magnitude (number of bits) and direction of the
shift operation. A positive value shifts the operand right.
A negative value shifts the operand left. A value of ‘0’
does not modify the operand.
The barrel shifter is 40 bits wide, thereby obtaining a
40-bit result for DSP shift operations and a 16-bit result
for MCU shift operations. Data from the X bus is
presented to the barrel shifter between bit positions 16
to 31 for right shifts, and bit positions 0 to 16 for left
shifts.
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