參數(shù)資料
型號(hào): DSPIC30F6011A-30I/PF
廠商: Microchip Technology
文件頁(yè)數(shù): 21/66頁(yè)
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 132K 64TQFP
產(chǎn)品培訓(xùn)模塊: Serial Communications using dsPIC30F CAN
Serial Communications using dsPIC30F I2C
Serial Communications using dsPIC30F SPI
Serial Communications using dsPIC30F UART
dsPIC30F 12 bit ADC - Part 2
dsPIC30F Addressing Modes - Part 1
dsPIC30F Architecture - Part 1
dsPIC30F DSP Engine & ALU
dsPIC30F Interrupts
dsPIC30F Motor Control PWM
dsPIC Timers
Asynchronous Stimulus
dsPIC30F Addressing Modes - Part 2
dsPIC30F Architecture - Part 2
標(biāo)準(zhǔn)包裝: 90
系列: dsPIC™ 30F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 30 MIP
連通性: CAN,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,LVD,POR,PWM,WDT
輸入/輸出數(shù): 52
程序存儲(chǔ)器容量: 132KB(44K x 24)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 2K x 8
RAM 容量: 6K x 8
電壓 - 電源 (Vcc/Vdd): 2.5 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 651 (CN2011-ZH PDF)
配用: XLT64PT4-ND - SOCKET TRAN ICE 64MQFP/TQFP
AC164313-ND - MODULE SKT FOR PM3 64PF
DV164005-ND - KIT ICD2 SIMPLE SUIT W/USB CABLE
dsPIC30F Flash Programming Specification
DS70102K-page 28
2010 Microchip Technology Inc.
8.5.7
ERASEB COMMAND
15
12 11
2
0
Opcode
Length
Reserved
MS
Field
Description
Opcode
0x7
Length
0x2
Reserved 0x0
MS
Select memory to erase:
0x0 = All Code in General Segment
0x1 = All Data EEPROM in General
Segment
0x2 = All Code and Data EEPROM in
General Segment, interrupt vectors and
FGS Configuration register
0x3 = Full Chip Erase
0x4 = All Code and Data EEPROM in
Boot, Secure and General Segments,
and FBS, FSS and FGS Configuration
registers
0x5 = All Code and Data EEPROM in
Secure and General Segments, and
FSS and FGS Configuration registers
0x6 = All Data EEPROM in Boot
Segment
0x7 = All Data EEPROM in Secure
Segment
The ERASEB command performs a Bulk Erase. The MS
field selects the memory to be bulk erased, with options
for erasing Code and/or Data EEPROM in individual
memory segments.
When Full Chip Erase is selected, the following
memory regions are erased:
All code memory (even if code-protected)
All data EEPROM
All code-protect Configuration registers
Only the executive code memory, Unit ID, device ID
and Configuration registers that are not code-protected
remain intact after a Chip Erase.
Expected Response (2 words):
0x1700
0x0002
Note:
A Full Chip Erase cannot be performed in
low-voltage programming systems (VDD
less than 4.5 volts). ERASED and ERASEP
must be used to erase code memory,
executive memory and data memory.
Alternatively, individual Segment Erase
operations may be performed.
8.5.8
ERASED COMMAND
15
12 11
8 7
0
Opcode
Length
Num_Rows
Addr_MSB
Addr_LS
Field
Description
Opcode
0x8
Length
0x3
Num_Rows Number of rows to erase (max of 128)
Addr_MSB
MSB of 24-bit base address
Addr_LS
LS 16 bits of 24-bit base address
The ERASED command erases the specified number of
rows of data EEPROM from the specified base
address. The specified base address must be a
multiple of 0x20. Since the data EEPROM is mapped
to program space, a 24-bit base address must be
specified.
After the erase is performed, all targeted bytes of data
EEPROM will contain 0xFF.
Expected Response (2 words):
0x1800
0x0002
Note:
The ERASED command cannot be used to
erase the Configuration registers or
device ID. Code-protect Configuration
registers can only be erased with the
ERASEB command, while the device ID is
read-only.
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