參數(shù)資料
型號: DSPIC33FJ32GP202T-I/SS
廠商: Microchip Technology
文件頁數(shù): 87/176頁
文件大小: 0K
描述: IC DSC 16BIT 32KB FLASH 28SSOP
標(biāo)準(zhǔn)包裝: 2,100
系列: dsPIC™ 33F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: I²C,IrDA,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 21
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-SSOP(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
DS70290J-page 18
2007-2011 Microchip Technology Inc.
3.3
Special MCU Features
The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
features a 17-bit by 17-bit single-cycle multiplier that is
shared by both the MCU ALU and DSP engine. The mul-
tiplier can perform signed, unsigned and mixed-sign mul-
tiplication. Using a 17-bit by 17-bit multiplier for 16-bit by
16-bit multiplication not only allows you to perform
mixed-sign multiplication, it also achieves accurate results
for special operations, such as (-1.0) x (-1.0).
The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
supports 16/16 and 32/16 divide operations, both frac-
tional and integer. All divide instructions are iterative oper-
ations. They must be executed within a REPEAT loop,
resulting in a total execution time of 19 instruction cycles.
The divide operation can be interrupted during any of
those 19 cycles without loss of data.
A 40-bit barrel shifter is used to perform up to a 16-bit left
or right shift in a single cycle. The barrel shifter can be
used by both MCU and DSP instructions.
FIGURE 3-1:
dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 CPU CORE BLOCK DIAGRAM
Instruction
Decode and
Control
PCH
PCL
Program Counter
16-bit ALU
24
23
Instruction Reg
PCU
16 x 16
W Register Array
ROM Latch
EA MUX
Interrupt
Controller
Stack
Control
Logic
Loop
Control
Logic
Data Latch
Address
Latch
Control Signals
to Various Blocks
Li
ter
a
lDat
a
16
To Peripheral Modules
Data Latch
Address
Latch
16
X RAM
Y RAM
Address Generator Units
16
Y Data Bus
X Data Bus
DSP Engine
Divide Support
16
23
16
8
PSV and Table
Data Access
Control Block
16
Program Memory
Data Latch
Address Latch
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