參數(shù)資料
型號(hào): DSPIC33FJ64GP706-I/PT
廠商: Microchip Technology
文件頁(yè)數(shù): 76/90頁(yè)
文件大?。?/td> 0K
描述: IC DSPIC MCU/DSP 64K 64TQFP
產(chǎn)品培訓(xùn)模塊: dsPIC33F DMAC
Introduction to dsPIC33F Architecture Part 1
Asynchronous Stimulus
Introduction to dsPIC33F Architecture Part 2
特色產(chǎn)品: PIC24FJ/33FJ MCUs & dsPIC? DSCs
標(biāo)準(zhǔn)包裝: 160
系列: dsPIC™ 33F
核心處理器: dsPIC
芯體尺寸: 16-位
速度: 40 MIP
連通性: CAN,I²C,IrDA,LIN,SPI,UART/USART
外圍設(shè)備: AC'97,欠壓檢測(cè)/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 18x10b/12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 653 (CN2011-ZH PDF)
配用: 876-1001-ND - DSPIC33 BREAKOUT BOARD
DM300024-ND - KIT DEMO DSPICDEM 1.1
DV164033-ND - KIT START EXPLORER 16 MPLAB ICD2
MA330012-ND - MODULE DSPIC33 100P TO 84QFP
MA330011-ND - MODULE DSPIC33 100P TO 100QFP
DM300019-ND - BOARD DEMO DSPICDEM 80L STARTER
DM240001-ND - BOARD DEMO PIC24/DSPIC33/PIC32
AC164327-ND - MODULE SKT FOR 64TQFP
dsPIC33F
DS70155C-page 76
Preliminary
2005 Microchip Technology Inc.
TABLE B-2:
dsPIC33F MOTOR CONTROL FAMILY VARIANTS (DEVICES MARKED “PS”)
U1CTS
U1RTS
U1RX
U1TX
U2CTS
U2RTS
U2RX
U2TX
I
O
I
O
I
O
I
O
ST
ST
ST
ST
UART1 clear to send.
UART1 ready to send.
UART1 receive.
UART1 transmit.
UART2 clear to send.
UART2 ready to send.
UART2 receive.
UART2 transmit.
VDD
P
Positive supply for peripheral logic and I/O pins.
VDDCORE
P
CPU logic filter capacitor connection.
VSS
P
Ground reference for logic and I/O pins.
VREF+
I
Analog
Analog voltage reference (high) input.
VREF-
I
Analog
Analog voltage reference (low) input.
TABLE B-1:
PINOUT I/O DESCRIPTIONS FOR MOTOR CONTROL FAMILY (CONTINUED)
Pin Name
Pin
Type
Buffer
Type
Description
Legend:
CMOS = CMOS compatible input or output; Analog = Analog input
ST = Schmitt Trigger input with CMOS levels; O = Output; I = Input; P = Power
Device
Pins
Program
Flash
Memory
(KB)
RAM
(KB)(1)
T
im
e
r16-b
it
In
p
u
tC
a
pt
ur
e
Ou
tp
ut
Co
m
p
a
re
St
d
.P
W
M
Mo
to
rCo
n
tro
l
PW
M
Q
u
ad
ratu
re
E
n
co
d
e
r
In
terface
Co
d
ec
I
n
terfa
c
e
A/
D
Con
v
erter
UART
SP
I
I2
C
CAN
I/O
Pi
ns
(
M
a
x
)(2)
Packages
33FJ128MC706
64
128
17
9
8
8 ch
1
0
2 A/D,
16 ch
22
2
1
53
PT
33FJ128MC708
80
128
17
9
8
8 ch
1
0
2 A/D,
18 ch
22
2
1
69
PT
33FJ256MC710
100
256
33
9
8
8 ch
1
0
2 A/D,
24 ch
22
2
86
PF
Note
1:
RAM size is inclusive of 1 KB DMA RAM.
2:
Maximum I/O pin count includes pins shared by the peripheral functions.
Note:
Prototype samples are intended for dsPIC33F early adopters and are based on early revision silicon. Devices
are marked with “PS” suffix. Major differences are noted in this data sheet. For additional information, please
refer to the
“dsPIC33F Data Sheet”.
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