
3
E0C6001
s PIN DESCRIPTION
Pin name
VDD
VSS
VS1
VL1
VL2
VL3
CA, CB
OSC1
OSC2
K00–K03
P00–P03
R00, R01
SEG0–19
COM0–3
RESET
TEST
Function
Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated
voltage output terminal
LCD system reducer output terminal (VL2
× 1/2)
/ LCD system reducer output terminal (VL3
× 1/3)
LCD system booster output terminal (VL1
× 2)
/ LCD system reducer output terminal (VL3
× 2/3)
LCD system booster output terminal (VL1
× 3)
/ LCD system booster output terminal (VL2
× 3/2)
Booster capacitor connecting terminal
Crystal or CR oscillation input terminal
Crystal or CR oscillation output terminal
Input terminal
I/O terminal
Output terminal
LCD segment output terminal
(convertible to DC output terminal by mask option)
LCD common output terminal
Initial setting input terminal
Test input terminal
Pin No.
47
46
2
43
42
41
44, 45
48
1
8–11
4–7
14, 13
36–27
24–15
37–40
26
25
In/Out
(I)
O
–
I
O
I
I/O
O
I
s BASIC EXTERNAL CONNECTION DIAGRAM
Piezo Buzzer Single Terminal Driving
Note: The above table is simply an example, and is not guaranteed to work.
C1
CG
C5
X'tal
1.5 V
or
3.0 V
Piezo
Buzzer
R01
K00
K03
P00
P03
R00
I
I/O
O
SEG0
SEG19
COM0
COM3
LCD
PANEL
Coil
CA
CB
VL1
VL2
VL3
VDD
OSC1
OSC2
VS1
RESET
TEST
VSS
Cp
Connection depending
on power supply and
LCD panel specification.
X'tal
CG
C1–C5
Cp
Crystal oscillator
Trimmer capacitor
Capacitor
32.768 kHz CI(MAX) = 35 k
5–25 pF
0.1
F
3.3
F
E0C6001