參數(shù)資料
型號(hào)： EDI88130CS
英文描述： 128Kx8 Monolithic SRAM(128Kx8 CMOS單片靜態(tài)RAM)
中文描述： 128Kx8單片的SRAM（128Kx8的CMOS單片靜態(tài)內(nèi)存）
文件頁(yè)數(shù)： 1/9頁(yè)
文件大?。?/td> 255K
代理商： EDI88130CS
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
HI-RELIABILITY PRODUCT
EDI88130CS
128Kx8 Monolithic SRAM, SMD 5962-89598
FEATURES
s Access Times of 15*, 17, 20, 25, 35, 45, 55ns
s Battery Back-up Operation
2V Data Retention (EDI88130LPS)
s CS1, CS2 & OE Functions for Bus Control
s Inputs and Outputs Directly TTL Compatible
s Organized as 128Kx8
s Commercial, Industrial and Military Temperature Ranges
s Thru-hole and Surface Mount Packages JEDEC Pinout
32 pin Sidebrazed Ceramic DIP, 400 mil (Package 102)
32 pin Sidebrazed Ceramic DIP, 600 mil (Package 9)
32 lead Ceramic SOJ (Package 140)
32 pad Ceramic Quad LCC (Package 12)
32 pad Ceramic LCC (Package 141)
32 lead Ceramic Flatpack (Package 142)
s Single +5V (
±10%) Supply Operation
February 2000 Rev. 9
PIN DESCRIPTION
I/O0-7
Data Inputs/Outputs
A0-16
Address Inputs
WE
Write Enable
CS1, CS2
Chip Selects
OE
Output Enable
VCC
Power (+5V
±10%)
VSS
Ground
NC
Not Connected
BLOCK DIAGRAM
Memory Array
Address
Buffer
Address
Decoder
I/O
Circuits
A-16
I/O-7
WE
OE
CS1
CS2
FIG. 1
PIN CONFIGURATION
The EDI88130CS is a high speed, high performance, 128Kx8 bits
monolithic Static RAM.
An additional chip enable line provides system memory security
during power down in non-battery backed up systems and memory
banking in high speed battery backed systems where large mul-
tiple pages of memory are required.
The EDI88130CS has eight bi-directional input-output lines to
provide simultaneous access to all bits in a word.
A low power version, EDI88130LPS, offers a 2V data retention
function for battery back-up applications.
Military product is available compliant to MIL-PRF-38535.
* 15ns access time is advanced information, contact factory for availability.
32 DIP
32 SOJ
32 CLCC
32 FLATPACK
TOP VIEW
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
VCC
A15
CS2
WE
A13
A8
A9
A11
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A
I/O
I/O1
I/O2
VSS
32 QUAD LCC
TOP VIEW
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
4321
32
31
30
14
15
16
17
18
19
20
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O
1
I/O
2
V
SS
I/O
3
I/O
4
I/O
5
I/O
6
WE
A13
A8
A9
A11
OE
A10
CS1
I/O7
A
12
A
14
A
16
NC
V
CC
A
15
CS
2
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EDI88130CS/LPS-C 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM
EDI88130CS/LPS-F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM
EDI88130CS/LPS-N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM
EDI88130CS/LPS-T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SRAM
EDI88130CS12CB 制造商:Microsemi Corporation 功能描述:128K X 8 SRAM MONOLITHIC, DUAL CHIP SELECT, 5V, 12NS, 32 DIP - Bulk
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